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OMAP3530: OMAP3530 & TPS65950 questions

Part Number: OMAP3530
Other Parts Discussed in Thread: TPS65950,

I have some questions between OMAP3530 and TPS65950.

 I connected I2C1 of OMAP3530 to I2C_CNTL of TPS65950 and I2C4 of OMAP3530 to I2C_SR of TPS65950

1. ADC:

 1a.  I am using ADCIN2 and ADCIN5 to monitor these two input voltages. I assume I can get the digital results for I2C_CNTL, right?

 1b.  How to read the results for 1a?

 1c. Do I need to connect "start ADC" of TPS65950 to OMAP3530? If so, how to? and how to control the signal of " start ADC"?

2. I believe I2C_SR is for programming TPS65950 from I2C4 of OMAP3530 per Smartflex. If I want to program TPS65950, does mean I need to put the code in the booting software, either sd card or NAND flash and I need to load the code to program TPS65950 every time the board is booting? Can I put the code in a memory to program?

3. I saw the datasheet said SYS_nIRQ/GPIO_0 of OMAp3530 need to connect to INT1 of TPS65950. What's the purpose? Do I need to do anything for it in the software?

Thanks.

  • Kevin

    I believe that this has been assigned to the wrong team as the majority of the questions are related to the TPS device. 

    I will transfer the ticket now. 

    --Paul M,

  • Kevin,

    This question has now been assigned to the expert on this PMIC device, but you may not receive a response until Monday.

  • Hi Kevin,

    This device is a legacy device with very limited design knowledge and support so please bear with me as we both work to understand the PMIC.

    1. I am having a hard time finding I2C_CNTL, is this a register in TPS65950 or in the processor?

    2. This question seems to be more processor focused, I will refer this to the processor team after I am able to assist with the PMIC based questions.

    3. According to section 1.6.5 of the TPS65950 TRM there are 18 GPIOs on TPS65950 that can handle various interrupt signals, one of which being INT1. I am not sure what the intention of the SYS_nIRQ/GPIO_0 pin is but this could be used to provide some type of interrupt for TPS65950. This is another question better answered by the processor team.

    Best regards,

    Layne J