Hi Ti team
It seems the ECC function is an option.
1. About DDR QVL list:
- Did Ti verify some DDR w/o ECC in AM65xx flatform?
- Did Ti verify the other DDRs w ECC in AM65xx flatform?
Did Ti have DDR QVL list Doc. for AM65xx flatform and share with us?
2. Whether ECC DDR's Size must be the same as the other 4 DDRs in IDK Kit? Such as the kit has 5xDDR4, one is ECC DDR4(1GB), The other four DRR all are 1GB.
When we change the size of DDRs from 1GBx8Bit to 2Gbx8Bit, whether we need to change ECC DDR from 1GB to 2GB? Or can we keep 1GB ECC DDR for a 4 x 2GB system?
3.What is the HW design rule for ECC DDR? How to design the 7xPins of ECC DDR if ECC function is Unused, Floating or pull up.....
4.If a non-QVl DDR be used in system , What's the suggestion for SW for DDR configure?
Thanks
