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DM6467 MCASP0 not able to capture audio in I2S mode

Hi All,

I have my custom board which have HDMI receiver chip's audio line(MCLK<-->AHCLKR,BCLK-<-->ACLKR,FSR,I2S[0-3]) is connected with DM6467 MCASP0.

My HDMI chip is in Master mode so all AHCLKR, ACLKR and FSR are generated by it.

I probe all the clock and data on DM6467 side and value of the clocks are as below.

AHCLKR = 12.287MHz

ACLKR =  3.072MHz

FSR = 48KHz

I can see the data on data line of MCASP0.

I configure the MCASP0 as below.

PDIR =0x00,RTDM =0x03, AHCLKRCTL=0x00, ACLKRCTL =0x00, RTDM =0x100

That is all clock are external and Slot size is 32 bit. I am using open source linux kernel released in 3.10 PSP. linux version is 2.6.32.

It seem that all are coming to DM6467 side but my MCASP0 is not able to capture audio.

There is no any EDMA interrupt in EDMA channel so it is not able to get audio data.

What can be the issue at MCASP0 side, Is there any configuration issue?

Any body can help me. I appreciate you help and suggestion.

Thanks

Hitesh

 

 

 

  • Hitesh,

    A lot of the times this happens when your initialization sequence of the state machine is not correct. Please have another look at the instruction in the user guide. Also, please make sure your frame sync is setup properly.

  • Hi Sriram,

    That are both same problem.

    As I had run the my application my another board of revision 1.1 and my application is running fine.

    So that will nor issue of revision version.

    As Paul reply me that can be the initialization issue in my kernel.

    Can you please what could be the initialization sequence?

    I am developing on kernel open source 2.32. It is based on the ALSA driver. It is already MCASP0 driver is there with codec TLVAIC33.

    It is working fine with it. In my product I am trying to capture audio on four serializer.

    Here I am sending my register dump of MCASP0

    reg 0x0 value 0x100102
    reg 0x4 value 0x0
    reg 0x8 value 0x0
    reg 0xc value 0x0
    reg 0x10 value 0x0
    reg 0x14 value 0x0
    reg 0x18 value 0x0
    reg 0x1c value 0x20000001
    reg 0x20 value 0x0
    reg 0x24 value 0x0
    reg 0x28 value 0x0
    reg 0x2c value 0x0
    reg 0x30 value 0x91
    reg 0x34 value 0x0
    reg 0x38 value 0x0
    reg 0x3c value 0x0
    reg 0x40 value 0x0
    reg 0x44 value 0x0
    reg 0x48 value 0x0
    reg 0x4c value 0x0
    reg 0x50 value 0x0
    reg 0x54 value 0x0
    reg 0x58 value 0x0
    reg 0x5c value 0x0
    reg 0x60 value 0x0
    reg 0x64 value 0xffffffff
    reg 0x68 value 0x180f0
    reg 0x6c value 0x100
    reg 0x70 value 0x0
    reg 0x74 value 0x0
    reg 0x78 value 0x3
    reg 0x7c value 0x0
    reg 0x80 value 0x104
    reg 0x84 value 0x0
    reg 0x88 value 0x82000000
    reg 0x8c value 0x0
    reg 0x90 value 0x0
    reg 0x94 value 0x0
    reg 0x98 value 0x0
    reg 0x9c value 0x0
    reg 0xa0 value 0x0
    reg 0xa4 value 0x0
    reg 0xa8 value 0x8074
    reg 0xac value 0x0
    reg 0xb0 value 0x0
    reg 0xb4 value 0x8000
    reg 0xb8 value 0x0
    reg 0xbc value 0x0
    reg 0xc0 value 0x10c
    reg 0xc4 value 0x17f
    reg 0xc8 value 0x0
    reg 0xcc value 0x0
    reg 0xd0 value 0x0
    reg 0xd4 value 0x0
    reg 0xd8 value 0x0
    reg 0xdc value 0x0
    reg 0xe0 value 0x0
    reg 0xe4 value 0x0
    reg 0xe8 value 0x0
    reg 0xec value 0x0
    reg 0xf0 value 0x0
    reg 0xf4 value 0x0
    reg 0xf8 value 0x0
    reg 0xfc value 0x0
    reg 0x100 value 0x0
    reg 0x104 value 0x0
    reg 0x108 value 0x0
    reg 0x10c value 0x0
    reg 0x110 value 0x0
    reg 0x114 value 0x0
    reg 0x118 value 0x0
    reg 0x11c value 0x0
    reg 0x120 value 0x0
    reg 0x124 value 0x0
    reg 0x128 value 0x0
    reg 0x12c value 0x0
    reg 0x130 value 0x0
    reg 0x134 value 0x0
    reg 0x138 value 0x0
    reg 0x13c value 0x0
    reg 0x140 value 0x0
    reg 0x144 value 0x0
    reg 0x148 value 0x0
    reg 0x14c value 0x0
    reg 0x150 value 0x0
    reg 0x154 value 0x0
    reg 0x158 value 0x0
    reg 0x15c value 0x0
    reg 0x160 value 0x0
    reg 0x164 value 0x0
    reg 0x168 value 0x0
    reg 0x16c value 0x0
    reg 0x170 value 0x0
    reg 0x174 value 0x0
    reg 0x178 value 0x0
    reg 0x17c value 0x0
    reg 0x180 value 0x2
    reg 0x184 value 0x2
    reg 0x188 value 0x2
    reg 0x18c value 0x2
    reg 0x190 value 0x2
    reg 0x194 value 0x2
    reg 0x198 value 0x2
    reg 0x19c value 0x2
    reg 0x1a0 value 0x2
    reg 0x1a4 value 0x2
    reg 0x1a8 value 0x2
    reg 0x1ac value 0x2
    reg 0x1b0 value 0x2
    reg 0x1b4 value 0x2
    reg 0x1b8 value 0x2
    reg 0x1bc value 0x2
    reg 0x1c0 value 0x0
    reg 0x1c4 value 0x0
    reg 0x1c8 value 0x0
    reg 0x1cc value 0x0
    reg 0x1d0 value 0x0
    reg 0x1d4 value 0x0
    reg 0x1d8 value 0x0
    reg 0x1dc value 0x0
    reg 0x1e0 value 0x0
    reg 0x1e4 value 0x0
    reg 0x1e8 value 0x0
    reg 0x1ec value 0x0
    reg 0x1f0 value 0x0
    reg 0x1f4 value 0x0
    reg 0x1f8 value 0x0
    reg 0x1fc value 0x0
    reg 0x200 value 0x0
    reg 0x204 value 0x0
    reg 0x208 value 0x0
    reg 0x20c value 0x0
    reg 0x210 value 0x0
    reg 0x214 value 0x0
    reg 0x218 value 0x0
    reg 0x21c value 0x0
    reg 0x220 value 0x0
    reg 0x224 value 0x0
    reg 0x228 value 0x0
    reg 0x22c value 0x0
    reg 0x230 value 0x0
    reg 0x234 value 0x0
    reg 0x238 value 0x0
    reg 0x23c value 0x0
    reg 0x240 value 0x0
    reg 0x244 value 0x0
    reg 0x248 value 0x0
    reg 0x24c value 0x0
    reg 0x250 value 0x0
    reg 0x254 value 0x0
    reg 0x258 value 0x0
    reg 0x25c value 0x0
    reg 0x260 value 0x0
    reg 0x264 value 0x0
    reg 0x268 value 0x0
    reg 0x26c value 0x0
    reg 0x270 value 0x0
    reg 0x274 value 0x0
    reg 0x278 value 0x0
    reg 0x27c value 0x0
    reg 0x280 value 0x0
    reg 0x284 value 0x0
    reg 0x288 value 0x0

     

    Can you please give me suggestion? Actually I am stuck up here.

    Thanks

    Hitesh

     

  • Hi All,

    When I am running same code on my another custom board DVPBHD based on DM6467, It works fine and able to receive audio packet.

    My MCASP0 driver code  and application are same. Still it is not working on my another custom board.

    DVPBHD board has SII9135 HDMI receiver chip and my board has ADV7441A HDMI receiver chip.

    I have following observation.

    1) I can see the AHCLK , ACLK , FSR  and AUXI_CLK at DM6467 in both the board.

    2) checked GBTL register of MCASP0 and It's value is 0x1f. That means all receive clocks are running mode.

    3) EDMA event for MCASP0 receive is 9.

    Attaching both board register dump.

    Please respond me what can be the issue here...

     

     

  • Hitesh,

    Please double check section 2.8.2 of the McASP user guide spruer1b for the initilization sequence.

     

  • Folks,

     

    Is this issue resolved?

    I have similar issue using SiI9135 with davinci-mcasp.c on receive side. Programming RGBLCTL to be 0x1f through mcasp_start_rx() but get GBLCTL = 0x3.

    What missing to have GBLCTL to sync with RGBLCTL to be 0x1f?

     

    Thanks.

     

    ----henry

     

  • Folks,

     

    I made progress and see data in buffer but DMA does not pick it up because "Unexpected frame sync" bit 1 (RSYNCERR) at RSTAT register in DM816x.

    McASP does not mention how to ignore it but McBSP does.

     

    Any folks can help out?

     

    ---henry

  • Yes,,,

    My probelm is resolved with proper sequence. I also set ASYNC bit of MCASP.

    I am able to get the interrupt on DMA side.

     

    Thanks

    Hitesh

  • Hitesh,

     

    Thanks for response.

    Could you please attached registers dumps and key sequence?

    After ASYNC=1, 64 words data are seen in receive FIFO but no DMA picks it up.

    RSTAT=177.

    I will double check my DMA.

     

    Thanks Again.

     

    ---henry

  • Hitesh and folks,

     

    I also use SiI9135. Here is my register dump. Wondering why DMA does not move data. How do I see DMA event?

    value of REV = 44306b02
    value of PFUNC = 0
    value of PDIR at 0x14 = 0
    value of PDOUT 0x18 = 0
    value of PDIN 0x1C = e0000010
    value of PDCLR 0x20 = 0
    value of GBLCTL 0x44 = 1f
    value of AMUTE  0x48 = 0
    value of RGBLCTL 0x60 = 1f
    value of RMASK 0x64 = ffffffff
    value of RFMT  0x68 = 80f0
    value of AFSRCTL 0x6C = 100
    value of ACLKRCTL 0x70 = 83
    value of AHCLKRCTL 0x74 = 0
    value of RTDM 0x78 = 3
    value of RINTCTL 0x7C = 0
    value of RSTAT 0x80 = 17d
    value of RSLOT 0x84 = 0
    value of RCLKCHK 0x88 = 40000000
    value of REVTCTL 0x8C = 0
    value of ACLKXCTL 0xB0 = 180040
    value of AHCLKXCTL 0xB4 = 8000
    value of SRCTL0 0x180 = 22
    value of SRCTL1 0x184 = 22
    value of SRCTL2 0x188 = 22
    value of SRCTL3 0x18C = 22
    value of SRCTL4 0x190 = 0
    value of SRCTL5 0x194 = 0
    value of RFIFOCTL 0x1008 = 10404
    value of RFIFOSTS 0x100c = 40

    Any help will be appreciated.

    Thanks.

    ----henry