• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 98 subscribers
  • Views 287 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM6548: PCIe Lanes

Stefan Lintner
Expert 5235 points

Part Number: AM6548

Hi Team,

could you help me clarifying the following:

AM6548 can support two m.2 connectors (let's call them connector A and connector B), each physically connected to both lanes on the sitara

    • If I connect a x2L card on M.2 connector A it will utilize the 2-lanes available on the sitara
    • If I connect an x1L card on M.2 connector A and another x1L card on M.2 connector B, the lanes will be split by the sitara (so using 2x x1 lanes)
    • If I connect a x2L card on M.2 connector A and another x1L card M.2 connector B, the lanes will be split by the sitara (so using 2x x1 lanes) --> lowering the speed for the faster card in favor of connectivity

BR,

Stefan

  • 0
    TI__Mastermind 23125 points

    Stefan, 

    If you like to support two M.2 connectors, then each connector shall only connect 1 lane to the AM65x. The 2port x 1Lane works as two separate PCIe ports, but limited to the total number of SERDES lanes. 

    so to clarify: 

    • If I connect a x2L card on M.2 connector A it will utilize the 2-lanes available on the sitara

    [Jian] you will also need to configure the AM65x to use PCIe0 controller, and use BOTH  SERDES to support this case, and, 1 port only. 

    • If I connect an x1L card on M.2 connector A and another x1L card on M.2 connector B, the lanes will be split by the sitara (so using 2x x1 lanes)

    [Jian] in this case, you would assign two each SERDES to one PCIe controller, to get 2 ports, 1 lane each. 

    • If I connect a x2L card on M.2 connector A and another x1L card M.2 connector B, the lanes will be split by the sitara (so using 2x x1 lanes) --> lowering the speed for the faster card in favor of connectivity

    [Jian] This case is not supported. You would need three SERDES lanes to support such use case. AM65x is limited to two SERDESs. 

    Please let us know if you need further clarifications. 

    regards

    jian