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Hi,
I am using AM5729 processor and planned to change DDR3L Data bits within a byte for layout ease. Is this acceptable?
Regards,
K.A.Rajeshwar.
Please see Section 2.11 (DDR3) of the AM57xx Schematic Checklist:
Data bit swapping within the data byte is allowed. The PHY is implemented such that this does not
impact leveling. Bit swapping is not allowed for any other group of signals, including ADDR and CNTL.