Hi All,
I would like to ask a question on EMIF to NOR flash routing.
Is there any requirement of equidistant routing as in DDR2? If there is, how strong it is? Does there exist a quantitative measure on the maximum difference between the longest and shortest path, for
1. 20+ Address lines
2. 8 or 16 data lines
Respectively?
I tried and actually found it to be pretty difficult to make either all address lines or all data lines to be of approximately equal length. So what should I do? If lines cannot be made of equal (approximately) lengths, say, the longest line is 600mil longer than the shortest in either address or data line group, will that cause error in operation (read, write, erase)?
Thanks,
Zheng
