TMS320C6748: External Memory configuration

Joaquin,

Thanks for providing good details on how your custom board is different from the LCDK so we can provide appropriate guidance to help you port your code.

1. DDR Settings: External DDR memory for this device is connected to the EMIFB MEmory controller and as you change the DDR memory part, you need to make changes to the SDTiming settings for the memory so the controller can interface with the memory and the DSP can read and write from it reliably. The clock settings for the DDR (PLL1) and the EMIF controller configuration is generally done using the GEL file to allow users to setup their debug environment. In order to help you configure the EMIF timings for different DDR memory parts, we provide a tool that is available from the application notes linked below:

https://www.ti.com/lit/an/spracq4/spracq4.pdf  

You will need to enter values from your DDR2 datasheet into the spreadsheet to obtain the right settings for the EMIF register and then apply those settings to the GEL file and potentially to the SBL/bootloader which also sets up DDR for production flash boot environment.

2. NAND flash setting: NAND on C6748 is interfaced to the asynchronous EMIF interface on the device. The configuration of flash boot peripheral is not usually done in the GEL files. This is done in the flash programmer utility or in the driver example code that performs read write tests to the flash. If you are familiar with the NAND flash technology, you will know that unlike DDR memory NAND is not directly addressable memory. It is organized in form of pages and blocks and to read and write to the NAND, you need to use the flash protocol to program the flash.  There is no size setting in the GEL. The GEL merely will setup the EMIF module clock (SYSCLK/2) and turn on the power to the module. The timing and address, data and ECC configuration needs to be managed using the flash programmer utility.

Examples Serial flash tools for the part:https://sourceforge.net/projects/dvflashutils/files/OMAP-L138/v2.40/ 

Joaquin Lopez contreras said:

..and potentially to the SBL/bootloader which also sets up DDR for production flash boot environment." can you be more specific? What is SBL/bootloader? what else should I do so my custom board work?

If you have designed DDR on your board, you will not only apply the DDR settings to the GEL file (initialization script meant to be used with debugger) but also with secondary bootloader. The device on power on reset when you set up the boot pins to boot from flash will run a ROM bootloader function in the device and read an image from flash into the device memory. The ROM bootloader is pre-programmed in the device and can`t be modified hence for application loading, we also provide a secondary bootloader so that the ROM bootloader loads this user defined secondary bootloader which in turn will load the production application image. The bootloader function is to initialize the device and board components and then load and run the application from flash.

The secondary bootloader is provided in our software packages or you can choose to create your own. This has no implication on the custom board but just software essential to load the image from flash.

Joaquin Lopez contreras said:

) If I understand well, I have to the modify the protocol to program the flash. I have already download the utility OMAP-L138_FlashAndBootUtils_2_40 and used with the LCDK6748 to program and boot from Flash.

Yes, if you are already using this utility then you will need modify this utility EMIF and NAND driver configuration to work with your new NAND. The package provides a CCS based NAND Flash writer and a serial flashing utility. To start, I would first modify the CCS based NAND writer and then look to modify the serial flashing tools.  the steps to modify the serial flash tools have been described in the application note here:

https://www.ti.com/lit/an/spracm8a/spracm8a.pdf?ts=1613686728893 (Refer section 2.3)

Hope this helps you understand the process.

Regards,

Rahul 

Hi Joaquin,

Can you indicate what was the intended operation when your product is deployed. We generally require customers to have a boot media attached to the device so the application will boot on the device from the flash/ or from a host connection (SPI slave, HPI, etc)  Is the custom board only meant for development and is the intended use to always connect an emulator and load code on the DSP.

If you look at the schematics review checklist for the device, we specifically call out boot related requirements.

https://www.ti.com/lit/an/sprack9/sprack9.pdf

If your board needs the functionality such that it starts running the application after you power cycles then you need to have a boot media and boot mode pins configured correctly to support this functionality. I can`t any alternatives as most application after development is complete will be designed to load and run from flash/boot media.

Regards,

Rahul

Thanks for the feedback on the document.

Joaquin Lopez contreras said:

As a workaround, for the first tests, I will use the UART2 to boot and load the program throught it . In production I will add a SD card on a future board.

Sounds good. USing UART boot will be good debug approach to get you application ready to boot from flash. 

Joaquin Lopez contreras said:

Meanwhile, I have been working in the GEL file for my future board. I have realized that the GEL file installed with CCS (C6748_LCDK.gel) for the LCDK was created for a Samsung K4T1G164QF but on the LCDK board, the memory installed is Winbond W971GG6KB. Both memories have several parameters differences and the GEL files is working for W971GG6KB. Why is this possible?

This is probably best answered by a DDR expert however let me provide my 2 cents. The GEL is just setting up the timing parameter that are optimal for reliable working with the DDR on the LCDK. The EMIF timings however that will work with wide range of similar DDR memory parts as the DDR timings generally work over a range of DDR parameters and the timing generated by the EMIF controller for the read and write cycles probably falls in the range of the device that you have in the custom board. The intent of the spreadsheet is to provide optimal timing values to reduce latency so while GEL settings are working with the DDR, it may not be the optimal values for reading and writing from your external memory part. 

Joaquin Lopez contreras said:

The memory I wil have in my new board (W971GG6SB) have only two different parameters with that on the LCDK. Specifically tRAS and tRC. For the new memory these are 40 and 52.5 and for memory in the LCDK are 45 and 57.5. Would it be possible that the GEL file (C6748_LCDK.gel) works with this new memory? If so, would I need the SD as a boot media?

This is not something that I can comment on as I can only provide guidance on bootloaders and porting software to custom platform using TI provided tools and not specific questions regarding DDR memory timing. My recommendation would be to open a new E2E ticket with specific DDR question 

If the settings are working from the GEL file, then they should work during booting from SD card as well but if you modify the settings in DDR then for production booting you will also need bootloader code/configuraiton to be updated to reflect the same change.