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AM3354: Linux/AM3354: Does not wakeup from standby

tortuguita
Intellectual 270 points

Part Number: AM3354

Hi

We have an AM3354 target with kernel 4.14 and a problem with standby exit. The AM3354 hangs sometimes in standby mode / standby entry. No wakeup source works. We have configured different wakeup sources (uart0, gpio0). Normally it wakes up as expected but very rarely the AM3354 does not leave standby mode or hangs in standby entry. The MPU voltage in error state is on standby level (1,11V). 

The target is running with governor performance (800MHz). The problem occurs more often if we change to the governor powersave (300MHz). The last kernel log is "PM: suspend entry (shallow)". Only a hard reset can bring the system up and running. In the following log are some correct standby entry/exit logs. The last entry is the bad one.

Does anyone have a tip? Any help is welcome. Thanks.

Jan 18 15:38:13 am335x user.info kernel: [ 8213.402056] wakeup_detect wakeup_detect: Device resumed because of TOUCH
Jan 18 15:38:13 am335x user.info kernel: [ 8213.441294] OOM killer enabled.
Jan 18 15:38:14 am335x user.info kernel: [ 8213.441321] Restarting tasks ... done.
Jan 18 15:38:14 am335x user.info kernel: [ 8213.469872] PM: suspend exit
Jan 18 15:38:14 am335x user.info kernel: [ 8213.927035] PM: suspend entry (shallow)
Jan 18 15:38:14 am335x user.info kernel: [ 8213.927340] PM: Syncing filesystems ... done.
Jan 18 15:38:14 am335x user.info kernel: [ 8214.028685] Freezing user space processes ... (elapsed 0.002 seconds) done.
Jan 18 15:38:14 am335x user.info kernel: [ 8214.031720] OOM killer disabled.
Jan 18 15:38:14 am335x user.info kernel: [ 8214.031728] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Jan 18 15:38:14 am335x user.warn kernel: [ 8214.033524] Suspending console(s) (use no_console_suspend to debug)
Jan 18 15:38:14 am335x user.info kernel: [ 8214.060583] pm33xx pm33xx: PM: Successfully put all powerdomains to target state
Jan 18 15:38:14 am335x user.info kernel: [ 8214.060583] PM: Wakeup source GPIO0
Jan 18 15:38:14 am335x user.info kernel: [ 8214.072925] wakeup_detect wakeup_detect: Device resumed because of TOUCH
Jan 18 15:38:14 am335x user.info kernel: [ 8214.112134] OOM killer enabled.
Jan 18 15:38:14 am335x user.info kernel: [ 8214.112176] Restarting tasks ... done.
Jan 18 15:38:14 am335x user.info kernel: [ 8214.137702] PM: suspend exit
Jan 18 15:38:15 am335x user.info kernel: [ 8214.597544] PM: suspend entry (shallow)
Jan 18 15:38:15 am335x user.info kernel: [ 8214.597571] PM: Syncing filesystems ... done.
Jan 18 15:38:15 am335x user.info kernel: [ 8214.697827] Freezing user space processes ... (elapsed 0.002 seconds) done.
Jan 18 15:38:15 am335x user.info kernel: [ 8214.700798] OOM killer disabled.
Jan 18 15:38:15 am335x user.info kernel: [ 8214.700806] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Jan 18 15:38:15 am335x user.warn kernel: [ 8214.702521] Suspending console(s) (use no_console_suspend to debug)
Jan 18 15:38:15 am335x user.info kernel: [ 8214.729720] pm33xx pm33xx: PM: Successfully put all powerdomains to target state
Jan 18 15:38:15 am335x user.info kernel: [ 8214.729720] PM: Wakeup source GPIO0
Jan 18 15:38:15 am335x user.info kernel: [ 8214.742044] wakeup_detect wakeup_detect: Device resumed because of TOUCH
Jan 18 15:38:15 am335x user.info kernel: [ 8214.781290] OOM killer enabled.
Jan 18 15:38:15 am335x user.info kernel: [ 8214.781314] Restarting tasks ... done.
Jan 18 15:38:15 am335x user.info kernel: [ 8214.807308] PM: suspend exit
Jan 18 15:38:15 am335x user.info kernel: [ 8215.261464] PM: suspend entry (shallow)
Jan 18 15:38:16 am335x user.info kernel: [ 8215.261491] PM: Syncing filesystems ... done.
Jan 18 15:38:16 am335x user.info kernel: [ 8215.370185] Freezing user space processes ... (elapsed 0.002 seconds) done.
Jan 18 15:38:16 am335x user.info kernel: [ 8215.373270] OOM killer disabled.
Jan 18 15:38:16 am335x user.info kernel: [ 8215.373279] Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done.
Jan 18 15:38:16 am335x user.warn kernel: [ 8215.375037] Suspending console(s) (use no_console_suspend to debug)
Jan 18 15:38:16 am335x user.info kernel: [ 8215.402021] pm33xx pm33xx: PM: Successfully put all powerdomains to target state
Jan 18 15:38:16 am335x user.info kernel: [ 8215.402021] PM: Wakeup source GPIO0
Jan 18 15:38:16 am335x user.info kernel: [ 8215.414458] wakeup_detect wakeup_detect: Device resumed because of TOUCH
Jan 18 15:38:16 am335x user.info kernel: [ 8215.453648] OOM killer enabled.
Jan 18 15:38:16 am335x user.info kernel: [ 8215.453673] Restarting tasks ... done.
Jan 18 15:38:16 am335x user.info kernel: [ 8215.479035] PM: suspend exit
Jan 18 15:38:16 am335x user.info kernel: [ 8215.936284] PM: suspend entry (shallow)

  • 0
    TI__Guru**** 181416 points

    Hi,

    I just tested Processor SDK linux v5.3.0.7 release on AM335x GP EVM, but don't see any issue with suspend/resume, with the combination of different governors, standby and mem suspend modes and wakeup by rtcwake, uart0 and gpio0_9.

    Please provide the full kernel boot log of your board.

  • 0
    TI__Guru*** 125430 points

    tortuguita said:
    The MPU voltage in error state is on standby level (1,11V). 

    Does the voltage drop to 0.95V during suspend and then returns to 1.1V when you resume?  That would tell us that the processor attempted to wake up but something failed.

    Can you check the DDR_CKE pin in the case of a failed resume?

    You may want to have a look at this video I made for debugging suspend-resume issues:

    https://www.youtube.com/watch?v=lzyTKxFC3F0&feature=youtu.be

    These 3 scripts are likely of use in debugging the issue:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ctt.dss

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ddr-analysis.dss

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ds0-analysis.dss

  • 0 in reply to Brad Griffis
    TI__Guru**** 181416 points

    Brad,

    Thanks for providing this useful information.

  • 0 in reply to Bin Liu
    Intellectual 270 points

    Hi

    The error does not occur each time. I can enter and leave standby mode more than 100 times before the error occurs. I have made a test case in which I enter every five seconds in standby, keep it for 2 seconds and exit standby mode. And this for hours and hours. Often it occurs after more than 10 hours.

    Thanks

  • 0 in reply to Bin Liu
    Intellectual 270 points

    Here is the full boot log:

    [    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.14.79-g3438de3474 (oe-user@oe-host) (gcc version 8.3.0 (GCC)) #1 PREEMPT Mon Feb 22 19:45:27 UTC 2021
[    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] OF: fdt: Machine model: TEST am335x
[    0.000000] Memory policy: Data cache writeback
[    0.000000] cma: Reserved 48 MiB at 0x8b800000
[    0.000000] On node 0 totalpages: 65536
[    0.000000] free_area_init_node: node 0, pgdat c0b392ec, node_mem_map cfda1000
[    0.000000]   Normal zone: 576 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 65536 pages, LIFO batch:15
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] AM335X ES2.1 (sgx neon)
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
[    0.000000] Kernel command line: console=ttyS3,115200n8 vt.global_cursor_default=0 root=/dev/mmcblk1p2 rootwait consoleblank=0 rauc.slot=B quiet
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Memory: 199424K/262144K available (6144K kernel code, 235K rwdata, 2192K rodata, 1024K init, 251K bss, 13568K reserved, 49152K cma-reserved,  0K highmem)
[    0.000000] Virtual kernel memory layout:
                   vector  : 0xffff0000 - 0xffff1000   (   4 kB)
                   fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)
                   vmalloc : 0xd0800000 - 0xff800000   ( 752 MB)
                   lowmem  : 0xc0000000 - 0xd0000000   ( 256 MB)
                   pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
                   modules : 0xbf000000 - 0xbfe00000   (  14 MB)
                     .text : 0xc0008000 - 0xc0700000   (7136 kB)
                     .init : 0xc0a00000 - 0xc0b00000   (1024 kB)
                     .data : 0xc0b00000 - 0xc0b3af80   ( 236 kB)
                      .bss : 0xc0b3af80 - 0xc0b79d4c   ( 252 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Preemptible hierarchical RCU implementation.
[    0.000000]  Tasks RCU enabled.
[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
[    0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts
[    0.000000] OMAP clockevent source: timer2 at 24000000 Hz
[    0.000015] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
[    0.000031] clocksource: timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
[    0.000038] OMAP clocksource: timer1 at 24000000 Hz
[    0.000205] timer_probe: no matching timers found
[    0.000392] Console: colour dummy device 80x30
[    0.000430] Calibrating delay loop... 795.44 BogoMIPS (lpj=3977216)
[    0.089173] pid_max: default: 32768 minimum: 301
[    0.089350] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.089361] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.090097] CPU: Testing write buffer coherency: ok
[    0.090154] CPU0: Spectre v2: using BPIALL workaround
[    0.090801] Setting up static identity map for 0x80100000 - 0x80100060
[    0.090945] Hierarchical SRCU implementation.
[    0.092635] devtmpfs: initialized
[    0.100394] random: get_random_u32 called from bucket_table_alloc+0x84/0x1a4 with crng_init=0
[    0.100809] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
[    0.101075] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.101092] futex hash table entries: 256 (order: -1, 3072 bytes)
[    0.104589] pinctrl core: initialized pinctrl subsystem
[    0.105569] NET: Registered protocol family 16
[    0.107746] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.120992] omap_hwmod: debugss: _wait_target_disable failed
[    0.173044] cpuidle: using governor ladder
[    0.173069] cpuidle: using governor menu
[    0.176880] gpio gpiochip0: (gpio): added GPIO chardev (254:0)
[    0.176969] gpiochip_setup_dev: registered GPIOs 0 to 31 on device: gpiochip0 (gpio)
[    0.177031] OMAP GPIO hardware version 0.1
[    0.177748] gpio gpiochip1: (gpio): added GPIO chardev (254:1)
[    0.177825] gpiochip_setup_dev: registered GPIOs 32 to 63 on device: gpiochip1 (gpio)
[    0.178501] gpio gpiochip2: (gpio): added GPIO chardev (254:2)
[    0.178576] gpiochip_setup_dev: registered GPIOs 64 to 95 on device: gpiochip2 (gpio)
[    0.179297] gpio gpiochip3: (gpio): added GPIO chardev (254:3)
[    0.179390] gpiochip_setup_dev: registered GPIOs 96 to 127 on device: gpiochip3 (gpio)
[    0.187703] hw-breakpoint: debug architecture 0x4 unsupported.
[    0.197533] edma 49000000.edma: TI EDMA DMA engine driver
[    0.198114] of_get_named_gpiod_flags: can't parse 'gpio' property of node '/fixedregulator@0[0]'
[    0.198443] of_get_named_gpiod_flags: parsed 'gpio' property of node '/fixedregulator@3[0]' - status (0)
[    0.201014] omap_i2c 44e0b000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c0_pins, deferring probe
[    0.201066] omap_i2c 4819c000.i2c: could not find pctldev for node /ocp/l4_wkup@44c00000/scm@210000/pinmux@800/pinmux_i2c2_pins, deferring probe
[    0.201256] EDAC MC: Ver: 3.0.0
[    0.202058] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
[    0.202396] Advanced Linux Sound Architecture Driver Initialized.
[    0.203200] clocksource: Switched to clocksource timer1
[    0.210918] NET: Registered protocol family 2
[    0.211577] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.211606] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[    0.211632] TCP: Hash tables configured (established 2048 bind 2048)
[    0.211728] UDP hash table entries: 256 (order: 0, 4096 bytes)
[    0.211744] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
[    0.211897] NET: Registered protocol family 1
[    0.212487] hw perfevents: no interrupt-affinity property for /pmu, guessing.
[    0.212592] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 counters available
[    0.218953] reset_cause reset_cause: Reset cause probe device
[    0.218977] BOOT REASON: COLD RESET / POWER ON
[    0.220065] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[    0.224147] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.224291] ntfs: driver 2.1.32 [Flags: R/O].
[    0.241661] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
[    0.241677] io scheduler noop registered
[    0.241682] io scheduler deadline registered
[    0.241900] io scheduler cfq registered (default)
[    0.241907] io scheduler mq-deadline registered
[    0.241912] io scheduler kyber registered
[    0.242759] pinctrl-single 44e10800.pinmux: 142 pins at pa f9e10800 size 568
[    0.245838] pwm-backlight backlight: GPIO lookup for consumer enable
[    0.245851] pwm-backlight backlight: using device tree for GPIO lookup
[    0.245866] of_get_named_gpiod_flags: can't parse 'enable-gpios' property of node '/backlight[0]'
[    0.245875] of_get_named_gpiod_flags: can't parse 'enable-gpio' property of node '/backlight[0]'
[    0.245881] pwm-backlight backlight: using lookup tables for GPIO lookup
[    0.245889] pwm-backlight backlight: lookup for GPIO enable failed
[    0.245911] pwm-backlight backlight: backlight supply power not found, using dummy regulator
[    0.247049] wkup_m3_ipc 44e11324.wkup_m3_ipc: could not get rproc handle
[    0.292128] Serial: 8250/16550 driver, 10 ports, IRQ sharing disabled
[    0.295072] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 30, base_baud = 3000000) is a 8250
[    0.295986] 48022000.serial: ttyS1 at MMIO 0x48022000 (irq = 31, base_baud = 3000000) is a 8250
[    0.296856] 481a6000.serial: ttyS3 at MMIO 0x481a6000 (irq = 32, base_baud = 3000000) is a 8250
[    0.308559] console [ttyS3] enabled
[    0.309508] 481a8000.serial: ttyS4 at MMIO 0x481a8000 (irq = 33, base_baud = 3000000) is a 8250
[    0.311177] omap_rng 48310000.rng: Random Number Generator ver. 20
[    0.312426] panel panel: GPIO lookup for consumer enable
[    0.312435] panel panel: using device tree for GPIO lookup
[    0.312471] of_get_named_gpiod_flags: parsed 'enable-gpios' property of node '/panel[0]' - status (0)
[    0.312542] panel panel: found enable GPIO
[    0.312852] OF: graph: no port node found in /ocp/lcdc@4830e000
[    0.319167] OF: graph: no port node found in /ocp/lcdc@4830e000
[    0.325611] OF: graph: no port node found in /ocp/lcdc@4830e000
[    0.331570] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    0.331574] [drm] No driver support for vblank timestamp query.
[    0.369899] Console: switching to colour frame buffer device 160x44
[    0.389221] tilcdc 4830e000.lcdc: fb0:  frame buffer device
[    0.389868] [drm] Initialized tilcdc 1.0.0 20121205 for 4830e000.lcdc on minor 0
[    0.396831] loop: module loaded
[    0.397163] gpio-wakeup network_gpio@16: GPIO lookup for consumer wakeup
[    0.397174] gpio-wakeup network_gpio@16: using device tree for GPIO lookup
[    0.397251] of_get_named_gpiod_flags: parsed 'wakeup-gpios' property of node '/network_gpio@16[0]' - status (0)
[    0.397488] gpio-wakeup optical_gpio@28: GPIO lookup for consumer wakeup
[    0.397497] gpio-wakeup optical_gpio@28: using device tree for GPIO lookup
[    0.397522] of_get_named_gpiod_flags: parsed 'wakeup-gpios' property of node '/optical_gpio@28[0]' - status (0)
[    0.400153] m25p80 spi0.0: is25lp032 (4096 Kbytes)
[    0.400537] 1 ofpart partitions found on MTD device spi0.0
[    0.400544] Creating 1 MTD partitions on "spi0.0":
[    0.400561] 0x000000000000-0x000000200000 : "boot"
[    0.401905] mdio_bus fixed-0: GPIO lookup for consumer reset
[    0.401917] mdio_bus fixed-0: using lookup tables for GPIO lookup
[    0.401924] mdio_bus fixed-0: lookup for GPIO reset failed
[    0.401944] libphy: Fixed MDIO Bus: probed
[    0.416333] mdio_bus 4a101000.mdio: GPIO lookup for consumer reset
[    0.416346] mdio_bus 4a101000.mdio: using lookup tables for GPIO lookup
[    0.416352] mdio_bus 4a101000.mdio: lookup for GPIO reset failed
[    0.473222] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
[    0.473232] davinci_mdio 4a101000.mdio: detected phy mask ffffffdf
[    0.474135] libphy: 4a101000.mdio: probed
[    0.474149] davinci_mdio 4a101000.mdio: phy[5]: device 4a101000.mdio:05, driver unknown
[    0.474741] cpsw 4a100000.ethernet: No slave[0] phy_id, phy-handle, or fixed-link property
[    0.483332] cpsw 4a100000.ethernet: Detected MACID = 30:45:11:75:45:e5
[    0.483433] cpsw 4a100000.ethernet: initialized cpsw ale version 1.4
[    0.483442] cpsw 4a100000.ethernet: ALE Table size 1024
[    0.483479] cpsw 4a100000.ethernet: cpts: overflow check period 500 (jiffies)
[    0.485033] i2c /dev entries driver
[    0.486344] omap_wdt: OMAP Watchdog Timer Rev 0x01: initial timeout 60 sec
[    0.487327] cpuidle: enable-method property 'ti,am3352' found operations
[    0.488119] omap_hsmmc 48060000.mmc: GPIO lookup for consumer cd
[    0.488128] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    0.488158] of_get_named_gpiod_flags: parsed 'cd-gpios' property of node '/ocp/mmc@48060000[0]' - status (0)
[    0.488177] omap_hsmmc 48060000.mmc: Got CD GPIO
[    0.488187] omap_hsmmc 48060000.mmc: GPIO lookup for consumer wp
[    0.488192] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    0.488201] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@48060000[0]'
[    0.488210] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@48060000[0]'
[    0.488216] omap_hsmmc 48060000.mmc: using lookup tables for GPIO lookup
[    0.488224] omap_hsmmc 48060000.mmc: lookup for GPIO wp failed
[    0.489007] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer cd
[    0.489015] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    0.489030] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@481d8000[0]'
[    0.489039] of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@481d8000[0]'
[    0.489045] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    0.489051] omap_hsmmc 481d8000.mmc: lookup for GPIO cd failed
[    0.489059] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer wp
[    0.489065] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    0.489072] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@481d8000[0]'
[    0.489080] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@481d8000[0]'
[    0.489086] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    0.489091] omap_hsmmc 481d8000.mmc: lookup for GPIO wp failed
[    0.489940] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/LED_RED[0]' - status (0)
[    0.490000] no flags found for gpios
[    0.490143] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/LED_GREEN[0]' - status (0)
[    0.490180] no flags found for gpios
[    0.490267] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/LED_BLUE[0]' - status (0)
[    0.490274] no flags found for gpios
[    0.490356] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/LED_STATUS_INT[0]' - status (0)
[    0.490363] no flags found for gpios
[    0.490441] of_get_named_gpiod_flags: parsed 'gpios' property of node '/leds/LED_STATUS_EXT[0]' - status (0)
[    0.490447] no flags found for gpios
[    0.490754] ledtrig-cpu: registered to indicate activity on CPUs
[    0.491883] remoteproc remoteproc0: wkup_m3 is available
[    0.497156] NET: Registered protocol family 10
[    0.498238] Segment Routing with IPv6
[    0.498306] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    0.498938] NET: Registered protocol family 17
[    0.499061] omap_voltage_late_init: Voltage driver support not added
[    0.505906] PM: Cannot get wkup_m3_ipc handle
[    0.543652] tps65910 0-002d: No interrupt support, no core IRQ
[    0.545349] vrtc: supplied by vbat
[    0.548959] vio: supplied by vbat
[    0.550041] random: fast init done
[    0.550347] vdd1: supplied by vbat
[    0.552022] vdd2: supplied by vbat
[    0.555128] vdig1: supplied by vbat
[    0.556394] vdig2: supplied by vbat
[    0.557651] vpll: supplied by vbat
[    0.558903] vdac: supplied by vbat
[    0.560154] vaux1: supplied by vbat
[    0.561409] vaux2: supplied by vbat
[    0.562647] vaux33: supplied by vbat
[    0.563981] vmmc: supplied by vbat
[    0.565312] vbb: supplied by vbat
[    0.566809] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 64 bytes/write
[    0.567034] tas2552 0-0040: GPIO lookup for consumer enable
[    0.567042] tas2552 0-0040: using device tree for GPIO lookup
[    0.567057] of_get_named_gpiod_flags: can't parse 'enable-gpios' property of node '/ocp/i2c@44e0b000/tas2552@40[0]'
[    0.567084] of_get_named_gpiod_flags: parsed 'enable-gpio' property of node '/ocp/i2c@44e0b000/tas2552@40[0]' - status (0)
[    0.567277] tas2552 0-0040: Failed to read register map: -121
[    0.573695] of_get_named_gpiod_flags: parsed 'gpio-reset' property of node '/ocp/i2c@44e0b000/tas2505@18[0]' - status (0)
[    0.573784] tas2505-codec 0-0018: Failed to read register map: -121
[    0.580206] tas2505-codec: probe of 0-0018 failed with error -121
[    0.580250] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
[    0.581584] edt_ft5x06 2-0038: GPIO lookup for consumer reset
[    0.581594] edt_ft5x06 2-0038: using device tree for GPIO lookup
[    0.581627] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/ocp/i2c@4819c000/hy461x@38[0]' - status (0)
[    0.581645] edt_ft5x06 2-0038: GPIO lookup for consumer wake
[    0.581650] edt_ft5x06 2-0038: using device tree for GPIO lookup
[    0.581660] of_get_named_gpiod_flags: can't parse 'wake-gpios' property of node '/ocp/i2c@4819c000/hy461x@38[0]'
[    0.581668] of_get_named_gpiod_flags: can't parse 'wake-gpio' property of node '/ocp/i2c@4819c000/hy461x@38[0]'
[    0.581674] edt_ft5x06 2-0038: using lookup tables for GPIO lookup
[    0.581681] edt_ft5x06 2-0038: lookup for GPIO wake failed
[    0.933261] edt_ft5x06 2-0038: touchscreen probe failed
[    0.938565] edt_ft5x06: probe of 2-0038 failed with error -121
[    0.938832] ili210x_i2c 2-0041: GPIO lookup for consumer reset
[    0.938840] ili210x_i2c 2-0041: using device tree for GPIO lookup
[    0.938865] of_get_named_gpiod_flags: parsed 'reset-gpios' property of node '/ocp/i2c@4819c000/ili@41[0]' - status (0)
[    1.274098] input: ILI210x Touchscreen as /devices/platform/ocp/4819c000.i2c/i2c-2/2-0041/input/input1
[    1.274434] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 400 kHz
[    1.276660] omap_hsmmc 48060000.mmc: GPIO lookup for consumer cd
[    1.276673] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    1.276704] of_get_named_gpiod_flags: parsed 'cd-gpios' property of node '/ocp/mmc@48060000[0]' - status (0)
[    1.276723] omap_hsmmc 48060000.mmc: Got CD GPIO
[    1.276733] omap_hsmmc 48060000.mmc: GPIO lookup for consumer wp
[    1.276739] omap_hsmmc 48060000.mmc: using device tree for GPIO lookup
[    1.276748] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@48060000[0]'
[    1.276756] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@48060000[0]'
[    1.276762] omap_hsmmc 48060000.mmc: using lookup tables for GPIO lookup
[    1.276769] omap_hsmmc 48060000.mmc: lookup for GPIO wp failed
[    1.277428] remoteproc remoteproc0: powering up wkup_m3
[    1.277447] remoteproc remoteproc0: Booting fw image am335x-pm-firmware.elf, size 150910
[    1.277673] remoteproc remoteproc0: remote processor wkup_m3 is now up
[    1.277704] wkup_m3_ipc 44e11324.wkup_m3_ipc: CM3 Firmware Version = 0x192
[    1.277869] wkup_m3_ipc 44e11324.wkup_m3_ipc: Direct firmware load for am335x-evm-scale-data.bin failed with error -2
[    1.277884] wkup_m3_ipc 44e11324.wkup_m3_ipc: Voltage scale fw name given but file missing.
[    1.334193] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer cd
[    1.334205] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    1.334222] of_get_named_gpiod_flags: can't parse 'cd-gpios' property of node '/ocp/mmc@481d8000[0]'
[    1.334232] of_get_named_gpiod_flags: can't parse 'cd-gpio' property of node '/ocp/mmc@481d8000[0]'
[    1.334238] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    1.334245] omap_hsmmc 481d8000.mmc: lookup for GPIO cd failed
[    1.334254] omap_hsmmc 481d8000.mmc: GPIO lookup for consumer wp
[    1.334260] omap_hsmmc 481d8000.mmc: using device tree for GPIO lookup
[    1.334268] of_get_named_gpiod_flags: can't parse 'wp-gpios' property of node '/ocp/mmc@481d8000[0]'
[    1.334275] of_get_named_gpiod_flags: can't parse 'wp-gpio' property of node '/ocp/mmc@481d8000[0]'
[    1.334281] omap_hsmmc 481d8000.mmc: using lookup tables for GPIO lookup
[    1.334287] omap_hsmmc 481d8000.mmc: lookup for GPIO wp failed
[    1.394451] PM: no-rtc available, rtc-only mode disabled.
[    1.395588] of_get_named_gpiod_flags: parsed 'gpios' property of node '/gpio_keys/button@21[0]' - status (0)
[    1.395946] input: gpio_keys as /devices/platform/gpio_keys/input/input2
[    1.397023] ALSA device list:
[    1.397032]   No soundcards found.
[    1.398654] Waiting for root device /dev/mmcblk1p2...
[    1.452170] mmc1: new high speed MMC card at address 0001
[    1.452770] mmcblk1: mmc1:0001 IS004G 1.82 GiB
[    1.452915] mmcblk1boot0: mmc1:0001 IS004G partition 1 2.00 MiB
[    1.453055] mmcblk1boot1: mmc1:0001 IS004G partition 2 2.00 MiB
[    1.453261] mmcblk1rpmb: mmc1:0001 IS004G partition 3 512 KiB
[    1.454802]  mmcblk1: p1 p2 p3
[    1.495206] EXT4-fs (mmcblk1p2): mounted filesystem with ordered data mode. Opts: (null)
[    1.495292] VFS: Mounted root (ext4 filesystem) readonly on device 179:2.
[    1.500642] devtmpfs: mounted
[    1.502153] Freeing unused kernel memory: 1024K
[    1.936849] EXT4-fs (mmcblk1p3): recovery complete
[    1.937896] EXT4-fs (mmcblk1p3): mounted filesystem with ordered data mode. Opts: (null)
[    2.070728] udevd[143]: starting version 3.2.7
[    2.078018] random: udevd: uninitialized urandom read (16 bytes read)
[    2.078709] random: udevd: uninitialized urandom read (16 bytes read)
[    2.079435] random: udevd: uninitialized urandom read (16 bytes read)
[    2.089612] udevd[143]: specified group 'kvm' unknown
[    2.118380] udevd[144]: starting eudev-3.2.7
[    2.646648] pvrsrvkm: loading out-of-tree module taints kernel.
[    2.676067] [drm] Initialized pvr 1.14.3699939 20110701 for 56000000.sgx on minor 1
[    3.546087] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[    5.062562] urandom_read: 1 callbacks suppressed
[    5.062575] random: dd: uninitialized urandom read (512 bytes read)
[    5.301327] net eth0: initializing cpsw version 1.12 (0)
[    5.303018] libphy: PHY  not found
[    5.306700] net eth0: phy "" not found on slave 0, err -19
[    5.315764] Generic PHY 4a101000.mdio:05: attached PHY driver [Generic PHY] (mii_bus:phy_addr=4a101000.mdio:05, irq=POLL)
[    5.321770] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[    8.404596] cpsw 4a100000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx
[    8.404673] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[    8.772688] random: dbus-uuidgen: uninitialized urandom read (12 bytes read)
[    8.772767] random: dbus-uuidgen: uninitialized urandom read (8 bytes read)
[    8.807851] random: dbus-daemon: uninitialized urandom read (12 bytes read)
[    8.888269] PVR_K: UM DDK-(3699939) and KM DDK-(3699939) match. [ OK ]
[   11.655831] random: crng init done
[   11.655852] random: 1 urandom warning(s) missed due to ratelimiting
[   12.516152] EXT4-fs (mmcblk1p1): mounted filesystem with ordered data mode. Opts: (null)
[   13.693909] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[   17.692784] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)
[   17.756408] EXT4-fs (mmcblk1p2): re-mounted. Opts: (null)

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    tortuguita said:
    [ 1.277869] wkup_m3_ipc 44e11324.wkup_m3_ipc: Direct firmware load for am335x-evm-scale-data.bin failed with error -2 [ 1.277884] wkup_m3_ipc 44e11324.wkup_m3_ipc: Voltage scale fw name given but file missing.

    Based on this line, I know the answer to my earlier question... Voltage scaling is not occurring because you're missing the associated file.  That's unrelated to your issue, but it would do two things:

    1. It would give us a visual indicator if the M3 was waking up the device as intended (e.g. as would happen if for some reason Linux crashed in the wakeup or something along those lines).

    2. Once you have everything working, your standby power will be even lower.

    If you're interested on details, please see the following documentation:

    http://software-dl.ti.com/processor-sdk-linux/esd/docs/latest/linux/Foundational_Components/Kernel/Kernel_Drivers/Power_Management.html

    Specifically look for the section titled "Deep Sleep Voltage Scaling" and "Binary Data Format".

    -------------------------

    Different topic....  Please do the following:

    1. Get your unit into a failed wakeup state.

    2. Check the status of DDR_CKE.

    3. Using JTAG see if you're able to connect to the Cortex A8.  If so, is the MMU enabled?  What address is it at?

    4. Regardless of whether you can use the A8, there's another core I'd like you to attach to called the DAP.  See this post for directions on how to connect.  Once you're connected to the DAP, please open a memory window to address 0x80000000.  Can you see data there?  If you refresh a bunch of times does it change?  If you poke a value into an address somewhere does it latch/stay?

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:

    Can you check the DDR_CKE pin in the case of a failed resume?

    Hi Brad

    The DDR_CKE is 0V in the case of a failure.

    Thanks & BR

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    tortuguita said:
    The DDR_CKE is 0V in the case of a failure.

    That indicates that the A8 never even got to a point where it attempted to bring the DDR out of reset.

    Can you run this JTAG script while your unit is failed:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ds0-analysis.dss

    Directions on how to run it are here:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/main/README

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:

    That indicates that the A8 never even got to a point where it attempted to bring the DDR out of reset.

    Can you run this JTAG script while your unit is failed:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ds0-analysis.dss

    I will test this, but sometimes it takes a long time until the error occurs. When the error occurs, then I post the result here. It is still running normally.

    Best regards

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Ok, in the attachment are the two files. If I connect the JTAG at the beginning, then I couldn't reproduce the error. The two files are from a target that was in the error state. So it was possible to connect the JTAG and read the configuration.

    BR

    Fullscreen am335x-ds0-analysis_2021-02-25_074639.txt Download 
    PRM_MPU: PM_MPU_PWRSTST = 0x000003f7
  * ERROR: Cortex A8 is still on!
PRM_GFX: PM_GFX_PWRSTST = 0x00000000
  * SGX530 is OFF.
PRM_PER: PM_PER_PWRSTST = 0x01e60007
  * ERROR: PER domain still on!
CM_PER: CM_PER_L4LS_CLKSTCTRL = 0x00000102
  * ERROR: L4LS active!
CM_PER: CM_PER_L3_CLKSTCTRL = 0x00000016
  * ERROR: L3 active!
  * ERROR: EMIF active!
    am335x-ds0-padconf_2021-02-25_074639.csv

  • 0 in reply to tortuguita
    TI__Guru**** 181416 points

    Hi Brad,

    Did you get a chance reviewing the result?

  • 0 in reply to Bin Liu
    TI__Guru*** 125430 points

    Bin Liu said:

    Hi Brad,

    Did you get a chance reviewing the result?

    Yes, the file shows that the A8 has been powered on by the M3.  At that point the A8 should execute the Linux resume code from on-chip SRAM.  It reconfigures DPLL's and DDR in these routines.  Based on your observation of DDR_CKE staying low, it did not complete this process, perhaps due to a crash or other issue.

    Please capture some additional logs in the case where the resume fails:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ctt.dss

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ddr-analysis.dss

    If you could correspondingly capture those logs from when Linux is up and running that would also be useful as a point of comparison.

    In fact, you could send the captures from when Linux is up and running right away.  You don't need to wait for the failure to send all of them together.  I'd like to sanity check your DDR configuration to see if there are any obvious issues.

    Bin is running a test right now with AM335x EVM running SDK 5.03 at 300 MHz to repeatedly test DS0 wakeup using RTC as the wakeup source.

    I'm also doing some testing of Linux SDK 5.03 with CPU at 300 MHz.  However, I'm using the BeagleBone Black as my hardware and I'm using a UART wake-up event.  I have a Tera Term script performing the test so that it can run for many hours.  It's only been running for 15 minutes or so, but I'm over 200 iterations so far with no issues.  I'll let it run for a long time though to get a more comprehensive result.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    TI__Guru**** 181416 points

    Minor correction:

    Brad Griffis said:
    Bin is running a test right now with AM335x EVM running SDK 5.03 at 300 MHz to repeatedly test DS0 wakeup using RTC as the wakeup source.

    I am testing standby mode not DS0. Running the following command in an infinite loop.

    rtcwake -m standby -s 2; sleep 2

  • 0 in reply to Bin Liu
    TI__Guru*** 125430 points

    -- can you please specify the command you're using for standby?  There's a mode called "standby" which is what Bin is testing.  I had assumed (perhaps incorrectly!) that by "standby" you were referring to DeepSleep0.  We need to align on precisely what's being tested.

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    We use the following command:

    echo "standby" >/sys/power/state

    The error occurs also in "mem" state. We cannot use the rtc wakeup because there is no rtc plugged on our pcb.

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    Thanks!  I had about 1000 iterations of "mem" without failure.  I just switched over to "standby" instead.

  • 0 in reply to Brad Griffis
    TI__Guru*** 125430 points

    FYI, my test ran all weekend and I just hit 50k iterations without issue:

    I talked with Bin and his test on the EVM also ran the entire weekend (35k+ iterations).  That said, the software itself seems to be performing properly based on our testing on the EVM+BBB.

    The next step will be to see some of the logs I requested for DDR and clock tree tool.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Thanks for the information. My targets are still running without error. I hope the error occurs as soon as possible.

    But I have another question. I tried to execute the ddr script (am335x-ddr-analysis.dss). But I run in the following problem (also with reduced TCLK). The other script am335x-ctt.dss works.

    Thanks & Best regards

  • 0 in reply to tortuguita
    Intellectual 270 points

    Sorry, here is the picture from the script/JTAG error (am335x-ddr-analysis.dss)

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    I just noticed that I included the wrong link in a recent post.  I included the AM57xx script instead of the AM335x script.  Hopefully you noticed and are not attempting to use the AM57xx script.  I corrected that post now.  I've also added a few extra print statements in the AM335x DDR script to help us understand why it's not working.  Please re-download and try again:

    http://git.ti.com/sitara-dss-files/am335x-dss-files/blobs/raw/main/am335x-ddr-analysis.dss

    There should be some prints in the scripting console.  Please let me know what you see.  FYI, I tried this script on my BBB running Linux SDK 5.03 and it worked fine.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:
    Hopefully you noticed and are not attempting to use the AM57xx script.

    I downloaded the correct one. But it's still not working. I tried a TCLK from 10kHz until 10MHz. 

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    I don't think the TCLK is actually related to the issue in this case given that you mentioned the other scripts were working fine.

    Can you try running this command from the Linux console prior to using the script:

    devmem2 0x44e00414 w 0x52580002

    Does that fix things?  One other option is to change line 104.  Currently it is:

    debugSessionDAP = ds.openSession("*","CS_DAP_M3");

    You could instead change it to:

    debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS");

    I won't go into all the details of why the script is written this way.  In short, there are a lot of conflicting uses of the script, and it's hard to make it work for all of them!  Hopefully one of these two suggestions does the trick.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:
    I won't go into all the details of why the script is written this way.  In short, there are a lot of conflicting uses of the script, and it's hard to make it work for all of them!  Hopefully one of these two suggestions does the trick.

    Hi Brad,

    I'm very sorry. Both of your mentioned solutions did not work. 

    I could reproduce the error now. So I could read back the ctt. The file is attached. Can I do something more?

    Thanks & Best regards

    Fullscreen am335x-ctt_2021-03-03_135215.txt Download 
    DeviceName AM335x_SR2.x_SR1.0
0x44e00000 0x00000102
0x44e00004 0x00000001
0x44e00008 0x00000102
0x44e0000c 0x00000016
0x44e00010 0x00070000
0x44e00014 0x00070000
0x44e00018 0x00030000
0x44e0001c 0x00070000
0x44e00020 0x00070000
0x44e00024 0x00070000
0x44e00028 0x00000002
0x44e0002c 0x00000002
0x44e00030 0x00030000
0x44e00034 0x00030000
0x44e00038 0x00030000
0x44e0003c 0x00030000
0x44e00040 0x00030000
0x44e00044 0x00030000
0x44e00048 0x00030000
0x44e0004c 0x00030000
0x44e00050 0x00030000
0x44e00054 0x00030000
0x44e00058 0x00030000
0x44e00060 0x00000002
0x44e00064 0x00000002
0x44e00068 0x00030000
0x44e0006c 0x00030000
0x44e00070 0x00030000
0x44e00074 0x00030000
0x44e00078 0x00030000
0x44e0007c 0x00030000
0x44e00080 0x00030000
0x44e00084 0x00030000
0x44e00088 0x00030000
0x44e0008c 0x00030000
0x44e00090 0x00030000
0x44e00094 0x00030000
0x44e00098 0x00030000
0x44e0009c 0x00030000
0x44e000a0 0x00030000
0x44e000a4 0x00030000
0x44e000a8 0x00030000
0x44e000ac 0x00030000
0x44e000b0 0x00030000
0x44e000b4 0x00030000
0x44e000b8 0x00030000
0x44e000bc 0x00030000
0x44e000c0 0x00030000
0x44e000c4 0x00030000
0x44e000c8 0x00030000
0x44e000cc 0x00030000
0x44e000d0 0x00000002
0x44e000d4 0x00030000
0x44e000d8 0x00030000
0x44e000dc 0x00000002
0x44e000e0 0x00000002
0x44e000e4 0x00060002
0x44e000e8 0x00070000
0x44e000ec 0x00030000
0x44e000f0 0x00030000
0x44e000f4 0x00030000
0x44e000f8 0x00030000
0x44e000fc 0x00070000
0x44e00100 0x00070000
0x44e00104 0x00030000
0x44e0010c 0x00030000
0x44e00110 0x00030000
0x44e0011c 0x0000000a
0x44e00120 0x00000002
0x44e00124 0x00070000
0x44e00128 0x00030000
0x44e0012c 0x00000001
0x44e00130 0x00060002
0x44e00134 0x00030000
0x44e00138 0x00030000
0x44e0013c 0x00030000
0x44e00140 0x00000001
0x44e00144 0x00000001
0x44e00148 0x00000011
0x44e0014c 0x00030000
0x44e00150 0x00000001
0x44e00400 0x00002616
0x44e00404 0x00000002
0x44e00408 0x00030000
0x44e0040c 0x00000002
0x44e00410 0x00000002
0x44e00414 0x12510000
0x44e00418 0x00000009
0x44e0041c 0x00000000
0x44e00420 0x00000001
0x44e00424 0x00000000
0x44e00428 0x00000000
0x44e0042c 0x00001901
0x44e00430 0x00000000
0x44e00434 0x00000001
0x44e00438 0x00000000
0x44e0043c 0x00000000
0x44e00440 0x00019017
0x44e00444 0x00000000
0x44e00448 0x00000001
0x44e0044c 0x00000000
0x44e00450 0x00000000
0x44e00454 0x00002b1d
0x44e00458 0x00000000
0x44e0045c 0x00000001
0x44e00460 0x00000000
0x44e00464 0x00000000
0x44e00468 0x0003e817
0x44e0046c 0x00000000
0x44e00470 0x00000001
0x44e00474 0x00000000
0x44e00478 0x00000000
0x44e0047c 0x00000000
0x44e00480 0x0000022a
0x44e00484 0x00000028
0x44e00488 0x00000007
0x44e0048c 0x00000007
0x44e00490 0x00000007
0x44e00494 0x00000007
0x44e00498 0x00000007
0x44e0049c 0x0403c017
0x44e004a0 0x00000201
0x44e004a4 0x00000022
0x44e004a8 0x00000001
0x44e004ac 0x00000085
0x44e004b0 0x00040002
0x44e004b4 0x00030000
0x44e004b8 0x00030000
0x44e004bc 0x00030000
0x44e004c0 0x00030000
0x44e004c4 0x00000002
0x44e004c8 0x00030000
0x44e004cc 0x00000006
0x44e004d0 0x00000002
0x44e004d4 0x00030000
0x44e004d8 0x00000004
0x44e00504 0x00000001
0x44e00508 0x00000001
0x44e0050c 0x00000001
0x44e00510 0x00000001
0x44e00514 0x00000004
0x44e00518 0x00000001
0x44e0051c 0x00000001
0x44e00520 0x00000000
0x44e00528 0x00000000
0x44e0052c 0x00000000
0x44e00530 0x00000000
0x44e00534 0x00000000
0x44e00538 0x00000001
0x44e0053c 0x00000000
0x44e00600 0x00000001
0x44e00604 0x00070000
0x44e00700 0x00000080
0x44e00800 0x00020002
0x44e00804 0x00000201
0x44e00900 0x00000001
0x44e00904 0x00070000
0x44e00908 0x00070000
0x44e0090c 0x00000001
0x44e00910 0x00030000
0x44e00914 0x00030000
0x44e00a00 0x00000001
0x44e00a20 0x00030000
0x44e00b00 0x00000000
0x44e00b04 0x00000500
0x44e00b08 0x00000000
0x44e00b0c 0x00000100
0x44e00b10 0x00000000
0x44e00c00 0x00000003
0x44e00c04 0x00000000
0x44e00c08 0x01e60007
0x44e00c0c 0xee0000eb
0x44e00d00 0x00000000
0x44e00d04 0x00000008
0x44e00d08 0x00000000
0x44e00d0c 0x00000020
0x44e00e00 0x01ff0007
0x44e00e04 0x000003f7
0x44e00e08 0x00000000
0x44e00f00 0x00000000
0x44e00f04 0x00001006
0x44e00f08 0x00000000
0x44e00f0c 0x78000017
0x44e00f10 0x00000003
0x44e00f14 0x00000000
0x44e00f18 0x00000003
0x44e00f1c 0x00000000
0x44e01000 0x00000004
0x44e01004 0x00000000
0x44e01100 0x00060044
0x44e01104 0x00000000
0x44e01110 0x00000000
0x44e01114 0x00000001
0x44e01200 0x00000000
0x44e01204 0x00000000
0x44e10040 0x00400337

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    tortuguita said:
    am335x-ctt_2021-03-03_135215.txt

    This is a clock tree dump taken while the device is in a failed wake-up state right?

    tortuguita said:
    I'm very sorry. Both of your mentioned solutions did not work. 

    Just to make sure we are aligned, the DDR dump was intended to be taken while the board is fully operational.  Neither of my suggestions worked in that case?

    Can you capture the clock tree dump while the board is up and operational (i.e. not in suspend)?

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:
    This is a clock tree dump taken while the device is in a failed wake-up state right?

    That's right. This is a clock tree dump from the error case.

    Brad Griffis said:
    Just to make sure we are aligned, the DDR dump was intended to be taken while the board is fully operational.  Neither of my suggestions worked in that case?

    Yes, both suggestions don't work in normal operation mode. I ran always into the same problem.

    Brad Griffis said:
    Can you capture the clock tree dump while the board is up and operational (i.e. not in suspend)?

    Attached is a clock tree dump from normal operation mode.

    BR

    Fullscreen am335x-ctt_2021-03-04_090830.txt Download 
    DeviceName AM335x_SR2.x_SR1.0
0x44e00000 0x00024502
0x44e00004 0x0000000a
0x44e00008 0x00000101
0x44e0000c 0x000000d6
0x44e00010 0x00070000
0x44e00014 0x00000002
0x44e00018 0x00000002
0x44e0001c 0x00070000
0x44e00020 0x00070000
0x44e00024 0x00000002
0x44e00028 0x00000002
0x44e0002c 0x00000002
0x44e00030 0x00000002
0x44e00034 0x00030000
0x44e00038 0x00030000
0x44e0003c 0x00030000
0x44e00040 0x00030000
0x44e00044 0x00030000
0x44e00048 0x00030000
0x44e0004c 0x00030000
0x44e00050 0x00030000
0x44e00054 0x00030000
0x44e00058 0x00030000
0x44e00060 0x00000002
0x44e00064 0x00020002
0x44e00068 0x00000002
0x44e0006c 0x00000002
0x44e00070 0x00030000
0x44e00074 0x00000002
0x44e00078 0x00000002
0x44e0007c 0x00030000
0x44e00080 0x00000002
0x44e00084 0x00030000
0x44e00088 0x00030000
0x44e0008c 0x00030000
0x44e00090 0x00000002
0x44e00094 0x00030000
0x44e00098 0x00030000
0x44e0009c 0x00030000
0x44e000a0 0x00030000
0x44e000a4 0x00030000
0x44e000a8 0x00030000
0x44e000ac 0x00000002
0x44e000b0 0x00000002
0x44e000b4 0x00000002
0x44e000b8 0x00030000
0x44e000bc 0x00000002
0x44e000c0 0x00030000
0x44e000c4 0x00030000
0x44e000c8 0x00030000
0x44e000cc 0x00030000
0x44e000d0 0x00020002
0x44e000d4 0x00030000
0x44e000d8 0x00000002
0x44e000dc 0x00000002
0x44e000e0 0x00000002
0x44e000e4 0x00070000
0x44e000e8 0x00070000
0x44e000ec 0x00030000
0x44e000f0 0x00030000
0x44e000f4 0x00030000
0x44e000f8 0x00030000
0x44e000fc 0x00000002
0x44e00100 0x00000002
0x44e00104 0x00030000
0x44e0010c 0x00030000
0x44e00110 0x00000002
0x44e0011c 0x0000007a
0x44e00120 0x00000002
0x44e00124 0x00070000
0x44e00128 0x00030000
0x44e0012c 0x00000001
0x44e00130 0x00060002
0x44e00134 0x00030000
0x44e00138 0x00030000
0x44e0013c 0x00030000
0x44e00140 0x00000001
0x44e00144 0x00000012
0x44e00148 0x00000012
0x44e0014c 0x00000002
0x44e00150 0x00000012
0x44e00400 0x00007716
0x44e00404 0x00000002
0x44e00408 0x00040002
0x44e0040c 0x00000002
0x44e00410 0x00000002
0x44e00414 0x12510000
0x44e00418 0x00000009
0x44e0041c 0x00000000
0x44e00420 0x00000001
0x44e00424 0x00000000
0x44e00428 0x00000000
0x44e0042c 0x00032017
0x44e00430 0x00000000
0x44e00434 0x00000001
0x44e00438 0x00000000
0x44e0043c 0x00000000
0x44e00440 0x00019017
0x44e00444 0x00000000
0x44e00448 0x00000001
0x44e0044c 0x00000000
0x44e00450 0x00000000
0x44e00454 0x0001873b
0x44e00458 0x00000000
0x44e0045c 0x00000001
0x44e00460 0x00000000
0x44e00464 0x00000000
0x44e00468 0x0003e817
0x44e0046c 0x00000000
0x44e00470 0x00000001
0x44e00474 0x00000000
0x44e00478 0x00000000
0x44e0047c 0x00000000
0x44e00480 0x0000022a
0x44e00484 0x00000228
0x44e00488 0x00000007
0x44e0048c 0x00000007
0x44e00490 0x00000007
0x44e00494 0x00000007
0x44e00498 0x00000007
0x44e0049c 0x0403c017
0x44e004a0 0x00000201
0x44e004a4 0x00000222
0x44e004a8 0x00000201
0x44e004ac 0x00000205
0x44e004b0 0x00040002
0x44e004b4 0x00000002
0x44e004b8 0x00030000
0x44e004bc 0x00000002
0x44e004c0 0x00030000
0x44e004c4 0x00000002
0x44e004c8 0x00030000
0x44e004cc 0x00000006
0x44e004d0 0x00000002
0x44e004d4 0x00000002
0x44e004d8 0x00000004
0x44e00504 0x00000001
0x44e00508 0x00000001
0x44e0050c 0x00000001
0x44e00510 0x00000001
0x44e00514 0x00000004
0x44e00518 0x00000001
0x44e0051c 0x00000001
0x44e00520 0x00000000
0x44e00528 0x00000000
0x44e0052c 0x00000000
0x44e00530 0x00000000
0x44e00534 0x00000000
0x44e00538 0x00000001
0x44e0053c 0x00000000
0x44e00600 0x00000001
0x44e00604 0x00070000
0x44e00700 0x00000080
0x44e00800 0x00020002
0x44e00804 0x00000201
0x44e00900 0x00000302
0x44e00904 0x00000002
0x44e00908 0x00070000
0x44e0090c 0x00000001
0x44e00910 0x00030000
0x44e00914 0x00030000
0x44e00a00 0x00000001
0x44e00a20 0x00030000
0x44e00b00 0x00000000
0x44e00b04 0x00000500
0x44e00b08 0x00000000
0x44e00b0c 0x00000100
0x44e00b10 0x00000000
0x44e00c00 0x00000003
0x44e00c04 0x00000000
0x44e00c08 0x01e60007
0x44e00c0c 0xee0000eb
0x44e00d00 0x00000000
0x44e00d04 0x00000008
0x44e00d08 0x00000000
0x44e00d0c 0x00000020
0x44e00e00 0x01ff0007
0x44e00e04 0x000003f7
0x44e00e08 0x00000000
0x44e00f00 0x00000000
0x44e00f04 0x00001006
0x44e00f08 0x00000000
0x44e00f0c 0x78000017
0x44e00f10 0x00000003
0x44e00f14 0x00000000
0x44e00f18 0x00000003
0x44e00f1c 0x00000000
0x44e01000 0x00000004
0x44e01004 0x00000000
0x44e01100 0x00060047
0x44e01104 0x00000000
0x44e01110 0x00000037
0x44e01114 0x00000001
0x44e01200 0x00000000
0x44e01204 0x00000000
0x44e10040 0x00400337

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    Can you try pausing at the u-boot prompt and trying the DDR script there?

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Brad Griffis said:
    Can you try pausing at the u-boot prompt and trying the DDR script there?

    It's the same. I run always into the same problem. Maybe I can read the most important DDR registers manually.

    Could you review the clock dump?

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Here are the two files from the ddr scripts. The first one is by pausing at the u-boot prompt and the second one by running linux.

    u-boot

    Fullscreen am335x-ddr-analysis_2021-03-04_175044.txt Download 
    Switched to DAP_DebugSS
Read value of 2b94402e from Device_ID register.
CONTROL: device_id = 0x2b94402e
  * AM335x family
  * Silicon Revision 2.1

CONTROL: control_status = 0x00400337
  * SYSBOOT[15:14] = 01b (24 MHz)
CM_CLKSEL_DPLL_DDR = 0x00019017
  * DPLL_MULT = 400 (x400)
  * DPLL_DIV = 23 (/24)
CM_DIV_M2_DPLL_DDR = 0x00000201
  * CLKST = 1: M2 output clock enabled
  * DIVHS = 1 (/1)

DPLL_DDR Summary
 -> F_input = 24 MHz
 -> CLKOUT_M2 = DDR_PLL_CLKOUT = 400 MHz

EMIF: SDRAM_CONFIG = 0x61c052b2
  * Bits 31:29 (reg_sdram_type) set for DDR3
  * Bits 28:27 (reg_ibank_pos) set to 0
  * Bits 26:24 (reg_ddr_term) set for RZQ/4 (001b)
  * Bits 22:21 (reg_dyn_odt) DDR3 dynamic ODT set to RZQ / 2
  * Bit  20    (reg_ddr_disable_dll) set to 0, DDR3 DLL enabled
  * Bits 19:18 (reg_sdram_drive) set for RZQ/6 (00b)
  * Bits 17:16 (reg_cwl) set for 0, CWL = 5
  * Bits 15:14 (reg_narrow_mode) set to 1 -> 16-bit EMIF interface
  * Bits 13:10 (reg_cl) set to 4 -> CL = 6
  * Bits 09:07 (reg_rowsize) set to 5 -> 14 row bits
  * Bits 06:04 (reg_ibank) set to 3 -> 8 banks
  * Bits 02:00 (reg_pagesize) set to 2 -> 10 column bits

EMIF: PWR_MGMT_CTRL = 0x00000000
 * Bits 10:8 reg_lp_mode set to 0, auto power management disabled
 * Warning: Bits 7:4 (reg_sr_tim) are in violation of Maximum Self-Refresh Command Limit
   -> Please see the silicon errata (DDR3: JEDEC Compliance for Maximum Self-Refresh Command Limit) for more details.
   -> This is only an issue if used in conjunction with reg_lp_mode=2.

DDR PHY: DDR_PHY_CTRL_1 = 0x00100007
  * Bits 9:8 (reg_phy_rd_local_odt) to 0 -> no termination
    -> Read termination is highly recommended in general for best DDR3 signal integrity
  * Bits 4:0 (reg_read_latency) set to 7
    -> If PHY_INVERT_CLKOUT=0, this is an appropriate value.
    -> If PHY_INVERT_CLKOUT=1, this is too small.
    -> PHY_INVERT_CLKOUT is a write-only register, so this needs to be
    -> inspected closely in the code and RatioSeed spreadsheet.

*********************
*** Register Dump ***
*********************

*(0x4c000000) = 0x40443403
*(0x4c000004) = 0x40000004
*(0x4c000008) = 0x61c052b2
*(0x4c00000c) = 0x00000000
*(0x4c000010) = 0x00000c30
*(0x4c000014) = 0x00000c30
*(0x4c000018) = 0x0aaae51b
*(0x4c00001c) = 0x0aaae51b
*(0x4c000020) = 0x26437fda
*(0x4c000024) = 0x26437fda
*(0x4c000028) = 0x501f83ff
*(0x4c00002c) = 0x501f83ff
*(0x4c000038) = 0x00000000
*(0x4c00003c) = 0x00000000
*(0x4c000054) = 0x00ffff38
*(0x4c000058) = 0x8000140a
*(0x4c00005c) = 0x00021616
*(0x4c000080) = 0x0028992b
*(0x4c000084) = 0x0001f6bb
*(0x4c000088) = 0x00010000
*(0x4c00008c) = 0x00000000
*(0x4c000090) = 0x0b23a8be
*(0x4c000098) = 0x00050000
*(0x4c00009c) = 0x00050000
*(0x4c0000a4) = 0x00000000
*(0x4c0000ac) = 0x00000000
*(0x4c0000b4) = 0x00000000
*(0x4c0000bc) = 0x00000000
*(0x4c0000c8) = 0x50074be4
*(0x4c0000d4) = 0x00000000
*(0x4c0000d8) = 0x00000000
*(0x4c0000dc) = 0x00000000
*(0x4c0000e4) = 0x00100007
*(0x4c0000e8) = 0x00100007
*(0x4c000100) = 0x00000000
*(0x4c000104) = 0x00000000
*(0x4c000108) = 0x00000000
*(0x4c000120) = 0x00000305

************************
*** IOCTRL Registers ***
************************

CONTROL: DDR_CMD0_IOCTRL = 0x0000018b
  * ddr_ba2 Pullup/Pulldown disabled
  * ddr_wen Pullup/Pulldown disabled
  * ddr_ba0 Pullup/Pulldown disabled
  * ddr_a5 Pullup/Pulldown disabled
  * ddr_ck Pullup/Pulldown disabled
  * ddr_ckn Pullup/Pulldown disabled
  * ddr_a3 Pullup/Pulldown disabled
  * ddr_a4 Pullup/Pulldown disabled
  * ddr_a8 Pullup/Pulldown disabled
  * ddr_a9 Pullup/Pulldown disabled
  * ddr_a6 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_ck and ddr_ckn
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_ba0, ddr_ba2, ddr_wen, ddr_a[9:8], ddr_a[6:3]
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_CMD1_IOCTRL = 0x0000018b
  * ddr_a15 Pullup/Pulldown disabled
  * ddr_a2 Pullup/Pulldown disabled
  * ddr_a12 Pullup/Pulldown disabled
  * ddr_a7 Pullup/Pulldown disabled
  * ddr_ba1 Pullup/Pulldown disabled
  * ddr_a10 Pullup/Pulldown disabled
  * ddr_a0 Pullup/Pulldown disabled
  * ddr_a11 Pullup/Pulldown disabled
  * ddr_casn Pullup/Pulldown disabled
  * ddr_rasn Pullup/Pulldown disabled
  * Bits 4:0 control ddr_15, ddr_a[12:10], ddr_a7, ddr_a2, ddr_a0, ddr_ba1, ddr_casn, ddr_rasn
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_CMD2_IOCTRL = 0x0000018b
  * ddr_cke Pullup/Pulldown disabled
  * ddr_resetn Pullup/Pulldown disabled
  * ddr_odt Pullup/Pulldown disabled
  * ddr_a14 Pullup/Pulldown disabled
  * ddr_a13 Pullup/Pulldown disabled
  * ddr_csn0 Pullup/Pulldown disabled
  * ddr_a1 Pullup/Pulldown disabled
  * Bits 4:0 control ddr_cke, ddr_resetn, ddr_odt, ddr_csn0, ddr_[a14:13], ddr_a1
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_DATA0_IOCTRL = 0x0000018b
  * ddr_d8 Pullup/Pulldown disabled
  * ddr_d9 Pullup/Pulldown disabled
  * ddr_d10 Pullup/Pulldown disabled
  * ddr_d11 Pullup/Pulldown disabled
  * ddr_d12 Pullup/Pulldown disabled
  * ddr_d13 Pullup/Pulldown disabled
  * ddr_d14 Pullup/Pulldown disabled
  * ddr_d15 Pullup/Pulldown disabled
  * ddr_dqm1 Pullup/Pulldown disabled
  * ddr_dqs1 and ddr_dqsn1 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_dqs1, ddr_dqsn1
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_d[15:8], ddr_dqm1
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_DATA1_IOCTRL = 0x0000018b
  * ddr_d0 Pullup/Pulldown disabled
  * ddr_d1 Pullup/Pulldown disabled
  * ddr_d2 Pullup/Pulldown disabled
  * ddr_d3 Pullup/Pulldown disabled
  * ddr_d4 Pullup/Pulldown disabled
  * ddr_d5 Pullup/Pulldown disabled
  * ddr_d6 Pullup/Pulldown disabled
  * ddr_d7 Pullup/Pulldown disabled
  * ddr_dqm0 Pullup/Pulldown disabled
  * ddr_dqs0 and ddr_dqsn0 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_dqs0, ddr_dqsn0
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_d[7:0], dqm0
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_IO_CTRL = 0x00000000
  * Bit 31: DDR_RESETn controlled by EMIF.
  * Bit 28 (mddr_sel) configured for SSTL, i.e. DDR2/DDR3/DDR3L operation.
CONTROL: VTP_CTRL = 0x00010167
  * VTP not disabled (expected in normal operation, but not DS0).
CONTROL: VREF_CTRL = 0x00000000
  * VREF supplied externally (typical).
CONTROL: DDR_CKE_CTRL = 0x00000001
  * CKE controlled by EMIF (normal/ungated operation).

    linux

    Fullscreen am335x-ddr-analysis_2021-03-04_175335.txt Download 
    CONTROL: device_id = 0x2b94402e
  * AM335x family
  * Silicon Revision 2.1

CONTROL: control_status = 0x00400337
  * SYSBOOT[15:14] = 01b (24 MHz)
CM_CLKSEL_DPLL_DDR = 0x00019017
  * DPLL_MULT = 400 (x400)
  * DPLL_DIV = 23 (/24)
CM_DIV_M2_DPLL_DDR = 0x00000201
  * CLKST = 1: M2 output clock enabled
  * DIVHS = 1 (/1)

DPLL_DDR Summary
 -> F_input = 24 MHz
 -> CLKOUT_M2 = DDR_PLL_CLKOUT = 400 MHz

EMIF: SDRAM_CONFIG = 0x61c052b2
  * Bits 31:29 (reg_sdram_type) set for DDR3
  * Bits 28:27 (reg_ibank_pos) set to 0
  * Bits 26:24 (reg_ddr_term) set for RZQ/4 (001b)
  * Bits 22:21 (reg_dyn_odt) DDR3 dynamic ODT set to RZQ / 2
  * Bit  20    (reg_ddr_disable_dll) set to 0, DDR3 DLL enabled
  * Bits 19:18 (reg_sdram_drive) set for RZQ/6 (00b)
  * Bits 17:16 (reg_cwl) set for 0, CWL = 5
  * Bits 15:14 (reg_narrow_mode) set to 1 -> 16-bit EMIF interface
  * Bits 13:10 (reg_cl) set to 4 -> CL = 6
  * Bits 09:07 (reg_rowsize) set to 5 -> 14 row bits
  * Bits 06:04 (reg_ibank) set to 3 -> 8 banks
  * Bits 02:00 (reg_pagesize) set to 2 -> 10 column bits

EMIF: PWR_MGMT_CTRL = 0x000000a0
 * Bits 10:8 reg_lp_mode set to 0, auto power management disabled

DDR PHY: DDR_PHY_CTRL_1 = 0x00100007
  * Bits 9:8 (reg_phy_rd_local_odt) to 0 -> no termination
    -> Read termination is highly recommended in general for best DDR3 signal integrity
  * Bits 4:0 (reg_read_latency) set to 7
    -> If PHY_INVERT_CLKOUT=0, this is an appropriate value.
    -> If PHY_INVERT_CLKOUT=1, this is too small.
    -> PHY_INVERT_CLKOUT is a write-only register, so this needs to be
    -> inspected closely in the code and RatioSeed spreadsheet.

*********************
*** Register Dump ***
*********************

*(0x4c000000) = 0x40443403
*(0x4c000004) = 0x40000004
*(0x4c000008) = 0x61c052b2
*(0x4c00000c) = 0x00000000
*(0x4c000010) = 0x00000c30
*(0x4c000014) = 0x00000c30
*(0x4c000018) = 0x0aaae51b
*(0x4c00001c) = 0x0aaae51b
*(0x4c000020) = 0x26437fda
*(0x4c000024) = 0x26437fda
*(0x4c000028) = 0x501f83ff
*(0x4c00002c) = 0x501f83ff
*(0x4c000038) = 0x000000a0
*(0x4c00003c) = 0x000000a0
*(0x4c000054) = 0x00ffff38
*(0x4c000058) = 0x8000140a
*(0x4c00005c) = 0x00021616
*(0x4c000080) = 0x09685379
*(0x4c000084) = 0x02af58bf
*(0x4c000088) = 0x00010000
*(0x4c00008c) = 0x00000000
*(0x4c000090) = 0xfec6882a
*(0x4c000098) = 0x00050000
*(0x4c00009c) = 0x00050000
*(0x4c0000a4) = 0x00000000
*(0x4c0000ac) = 0x00000000
*(0x4c0000b4) = 0x00000000
*(0x4c0000bc) = 0x00000000
*(0x4c0000c8) = 0x50074be4
*(0x4c0000d4) = 0x00000000
*(0x4c0000d8) = 0x00000000
*(0x4c0000dc) = 0x00000000
*(0x4c0000e4) = 0x00100007
*(0x4c0000e8) = 0x00100007
*(0x4c000100) = 0x00000000
*(0x4c000104) = 0x00000000
*(0x4c000108) = 0x00000000
*(0x4c000120) = 0x00000305

************************
*** IOCTRL Registers ***
************************

CONTROL: DDR_CMD0_IOCTRL = 0x0000018b
  * ddr_ba2 Pullup/Pulldown disabled
  * ddr_wen Pullup/Pulldown disabled
  * ddr_ba0 Pullup/Pulldown disabled
  * ddr_a5 Pullup/Pulldown disabled
  * ddr_ck Pullup/Pulldown disabled
  * ddr_ckn Pullup/Pulldown disabled
  * ddr_a3 Pullup/Pulldown disabled
  * ddr_a4 Pullup/Pulldown disabled
  * ddr_a8 Pullup/Pulldown disabled
  * ddr_a9 Pullup/Pulldown disabled
  * ddr_a6 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_ck and ddr_ckn
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_ba0, ddr_ba2, ddr_wen, ddr_a[9:8], ddr_a[6:3]
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_CMD1_IOCTRL = 0x0000018b
  * ddr_a15 Pullup/Pulldown disabled
  * ddr_a2 Pullup/Pulldown disabled
  * ddr_a12 Pullup/Pulldown disabled
  * ddr_a7 Pullup/Pulldown disabled
  * ddr_ba1 Pullup/Pulldown disabled
  * ddr_a10 Pullup/Pulldown disabled
  * ddr_a0 Pullup/Pulldown disabled
  * ddr_a11 Pullup/Pulldown disabled
  * ddr_casn Pullup/Pulldown disabled
  * ddr_rasn Pullup/Pulldown disabled
  * Bits 4:0 control ddr_15, ddr_a[12:10], ddr_a7, ddr_a2, ddr_a0, ddr_ba1, ddr_casn, ddr_rasn
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_CMD2_IOCTRL = 0x0000018b
  * ddr_cke Pullup/Pulldown disabled
  * ddr_resetn Pullup/Pulldown disabled
  * ddr_odt Pullup/Pulldown disabled
  * ddr_a14 Pullup/Pulldown disabled
  * ddr_a13 Pullup/Pulldown disabled
  * ddr_csn0 Pullup/Pulldown disabled
  * ddr_a1 Pullup/Pulldown disabled
  * Bits 4:0 control ddr_cke, ddr_resetn, ddr_odt, ddr_csn0, ddr_[a14:13], ddr_a1
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_DATA0_IOCTRL = 0x0000018b
  * ddr_d8 Pullup/Pulldown disabled
  * ddr_d9 Pullup/Pulldown disabled
  * ddr_d10 Pullup/Pulldown disabled
  * ddr_d11 Pullup/Pulldown disabled
  * ddr_d12 Pullup/Pulldown disabled
  * ddr_d13 Pullup/Pulldown disabled
  * ddr_d14 Pullup/Pulldown disabled
  * ddr_d15 Pullup/Pulldown disabled
  * ddr_dqm1 Pullup/Pulldown disabled
  * ddr_dqs1 and ddr_dqsn1 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_dqs1, ddr_dqsn1
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_d[15:8], ddr_dqm1
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_DATA1_IOCTRL = 0x0000018b
  * ddr_d0 Pullup/Pulldown disabled
  * ddr_d1 Pullup/Pulldown disabled
  * ddr_d2 Pullup/Pulldown disabled
  * ddr_d3 Pullup/Pulldown disabled
  * ddr_d4 Pullup/Pulldown disabled
  * ddr_d5 Pullup/Pulldown disabled
  * ddr_d6 Pullup/Pulldown disabled
  * ddr_d7 Pullup/Pulldown disabled
  * ddr_dqm0 Pullup/Pulldown disabled
  * ddr_dqs0 and ddr_dqsn0 Pullup/Pulldown disabled
  * Bits 9:5 control ddr_dqs0, ddr_dqsn0
    - Slew slow
    - Drive Strength 9 mA
  * Bits 4:0 control ddr_d[7:0], dqm0
    - Slew slow
    - Drive Strength 8 mA
CONTROL: DDR_IO_CTRL = 0x00000000
  * Bit 31: DDR_RESETn controlled by EMIF.
  * Bit 28 (mddr_sel) configured for SSTL, i.e. DDR2/DDR3/DDR3L operation.
CONTROL: VTP_CTRL = 0x00010167
  * VTP not disabled (expected in normal operation, but not DS0).
CONTROL: VREF_CTRL = 0x00000000
  * VREF supplied externally (typical).
CONTROL: DDR_CKE_CTRL = 0x00000001
  * CKE controlled by EMIF (normal/ungated operation).

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    Great!  How did you finally get it to work?!

    I had a look at the DDR parameters.  I can see these parameters were configured using our original spreadsheet collateral.  We have an updated EMIF spreadsheet for AM335x that uses invert_clkout=1 in conjunction with several other adjustments to achieve better margin.  However, I really don't think that's the underlying issue, so I think we should put that on pause.

    Your clocking looked fine too.  I could see the MPU at 800 MHz, DDR at 400 MHz, etc.  Very typical looking configuration.

    I think the next step will need to be to instrument some of the suspend/resume related files.  In short we want to create a couple of variables that are in internal SRAM.  Then we can progressively set bits in these variables as we progress through the suspend and resume process.  The key files we likely want to focus on are:

    arch/arm/mach-omap2/sleep33xx.S
    drivers/memory/ti-emif-pm.c
    drivers/memory/ti-emif-sram-pm.S

    I'll need some more time to put together specific suggestions here related to the instrumentation, but thought I'd mention the files in case you have time to get things started.  I'll try to come back soon with a patch or example.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Have you prepared something? Is there anything else I can do?

    Thanks & Best regards

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    Bin -- can you help with this one? 

    In short, I suggest defining a few extra variables in SRAM where you zero them out at the start of the resume sequence and then set bits as you go.  Then you can look after a failed resume to understand where we failed.

    Sorry I have gotten backlogged.  I have been trying to find an example of where I've done this before, but so far haven't found it.

  • 0 in reply to Brad Griffis
    TI__Guru**** 181416 points

    I will look into it.

  • 0 in reply to Bin Liu
    TI__Guru*** 125430 points

    Tortuguita,

    I just noticed that this issue has a very close resemblance to an issue I saw a few years ago.  The kernel has changed a little bit since then, so I can't precisely use that patch, but I have adapted it slightly.  Will you please try this out:

    [EDIT -- see patch two posts down.  I fixed a mistake...]

    If we don't have any success with this patch, then I think we should proceed with the instrumentation I mentioned previously.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Thank you very much. I hope it will solve our problem. I will build the firmware with the patch and keep it running at the weekend. I hope I can give you positive feedback next Monday.

    Thanks & BR

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    I had a mistake in the previous patch.  I've corrected it below.  It's probably easier to apply on your side if I provide the patch file:

    Fullscreen patch-for-am3-resume-issue.patch.txt Download 
    From 0f60cd0dd79d2152e0f8b147da83dc443c6809a7 Mon Sep 17 00:00:00 2001
From: Brad Griffis <Brad Griffis>
Date: Thu, 18 Mar 2021 16:50:29 -0500
Subject: [PATCH] patch for am3 resume issue

---
 drivers/memory/ti-emif-sram-pm.S | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/drivers/memory/ti-emif-sram-pm.S b/drivers/memory/ti-emif-sram-pm.S
index a5369181e5c..3decf117fd3 100644
--- a/drivers/memory/ti-emif-sram-pm.S
+++ b/drivers/memory/ti-emif-sram-pm.S
@@ -298,6 +298,27 @@ ENTRY(ti_emif_exit_sr)
 	tst     r1, #EMIF_STATUS_READY
 	beq     1b
 
+	/* Short delay, and then repeat once more */
+	mov     r1, #0x0
+	mov     r2, #0x100
+delay:
+	cmp     r1, r2
+	add     r1, r1, #0x1
+	bne     delay
+
+	ldr	r2, [r4, #EMIF_PM_REGS_PHYS_OFFSET]
+        ldr     r1, [r2, #EMIF_PMCR_VAL_OFFSET]
+        bic     r1, r1, #EMIF_POWER_MGMT_SELF_REFRESH_MODE_MASK
+        orr     r1, r1, #EMIF_POWER_MGMT_SELF_REFRESH_MODE
+        str     r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL]
+        bic     r1, r1, #EMIF_POWER_MGMT_SELF_REFRESH_MODE_MASK
+        str     r1, [r0, #EMIF_POWER_MANAGEMENT_CONTROL]
+
+	/* Wait for EMIF to become ready */
+2:	ldr     r1, [r0, #EMIF_STATUS]
+	tst     r1, #EMIF_STATUS_READY
+	beq     2b
+
 	mov	pc, lr
 ENDPROC(ti_emif_exit_sr)
 
-- 
2.25.1

    Also, keep in mind that by default this will impact a module (drivers/memory/ti-emif-sram.ko) and not the zImage assuming you didn't change that behavior.  Just make sure you're updating the *.ko in your file system rather than the zImage when you test it.

    I'm about to leave on vacation, so I wasn't able to perform deep regression test.  I've only confirmed I didn't actually break suspend/resume with some quick testing.  However, I did one time see a very similar issue at a customer where this adjustment resolved their issues.  I'm hoping it will do the same for you.

    Best regards,
    Brad

  • 0 in reply to Brad Griffis
    Intellectual 270 points

    Hi Brad

    Ok, thanks for this information. I built with the first patch my new kernel but it didn't work. It has never waked up from standby. So I will use your new patch. As I understand your explanation, I shouldn't update the kernel itself, only its module, right? But in my filesystem I don't have a ti-emif-sram.ko loaded. So I install/load only the newly built ti-emif-sram.ko module?

    Thanks & Best regards

  • 0 in reply to tortuguita
    TI__Guru*** 125430 points

    The original also caused my board to hang.  Sorry about that! I confirmed the updated patch works.

    Did you change the Linux kernel config such that the TI EMIF SRAM driver is built-in rather than a module?  I'm surprised to hear you don't have this module.  If you didn't explicitly make this change, then it makes me wonder if something is wrong in your setup.

  • 0 in reply to tortuguita
    TI__Guru**** 181416 points

    Hi,

    Depending on kernel configurations, some drivers might be builtin or not, so we always recommend to update both kernel image and modules to the filesystem, to avoid any potential kernel symbol mismatch.

  • 0 in reply to Brad Griffis
    TI__Guru**** 181416 points

    Brad,

    In my own kernel build, CONFIG_TI_EMIF_SRAM=y, so the driver could be builtin.

  • 0 in reply to Bin Liu
    Intellectual 270 points

    In our kernel it is builtin. So I build only the new kernel and test it now.

    Thanks & BR

  • 0 in reply to Bin Liu
    Intellectual 270 points

    Ok, two targets are running with the newly built kernel. I will keep you informed.

    Thanks & BR

  • 0 in reply to Bin Liu
    Intellectual 270 points

    Unfortunately the patch did not resolve our problem. The error occurred again...

  • 0 in reply to tortuguita
    TI__Guru**** 181416 points

    Thanks for the update. I will look into it to get the next step debug. It might take a few days as I would have to sync up with Brad once he is back from vacation.

  • 0 in reply to Bin Liu
    Intellectual 270 points

    No problem. Now I'm also on vacation.

    BR

  • 0 in reply to Bin Liu
    Intellectual 270 points

    Hi Brad and Bin Liu

    I'm sorry, I was a long time out of office. Do you have some more ideas?

     

    Thanks & best regards

  • 0 in reply to tortuguita
    TI__Guru**** 181416 points

    Hi Tortuguita,

    No worries, and sorry for the delay from our side. I have been working on a new project and didn't get a chance to look at this deeply either.

    As discussed before, the idea of debugging is to define a memory variable (for example 4 bytes) in SRAM, then in the kernel at certain places of the DDR suspend and resume routine, write different values to this SRAM area, so that we can check the value in the SRAM location from CCS/JTAG when resume got stuck, to tell where it hangs in DDR suspend/resume.

    Sorry, I currently don't have bandwidth to provide the exact kernel patch to do so, but hopefully you can follow the idea and find the place in kernel code where it hangs.