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TDA4VM: Low power mode entry - should PMIC NSLEEP lines be connected?

Sakthivelu Sambasivam
Prodigy 100 points
Part Number: TDA4VM

Hi,

As per LPM entry sequence ACT-21 (pg.1933. RM), DMSC FW will send commands to PMIC for any power down seq.

If this happens via I2C control,  Can we ignore the NSLEEP1 & NSLEEP2 pins not connected to the PMIC?

  • 0
    TI__Guru 63181 points

    Hello,

       Yes.  That is correct.  Also, please refer to the datasheet regarding NSLEEP1 and NSLEEP2 functions:

      

    "The SLEEP requests are activated through the assertion of nSLEEP1 or nSLEEP2 pins, which are the secondary functions of the 11 GPIO pins and can be selected through GPIO configuration using the GPIOx_SEL register bits. If the nSLEEP1 or nSLEEP2 pins are not available, the NSLEEP1B and NSLEEP2B register bits can be configured in place for their functions. The input of nSLEEP1 pin and the state of the NSLEEP1B register bit are combined to create the NSLEEP1 signal through an OR function. Similarly for the input of the nSLEEP2 pin and the NSLEEP2B register bit as they are combined to create the NSLEEP2 signal."

    Regards,

    Chris