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DM6437: Errata on McBSP- Serial Port (McASP, McBSP) Transfers Should be Buffered in Internal Memory

Hi,

I am using a DM6437 EVM. When I looked into the errata sprz250d, section 2.1.2. It says that the audio packets may be dropped in case of McASP/McBSP, because of the DDR2 latency and the refresh cycle. This can be eliminated by using L2 as RAM. (in this case advisory 1.3.11 comes into picture).

Now, I want to know, is there any silicon revision which has come with bug fixed for this errata?

Basically I am using the McBSP in SPI mode, does the errata mentioned above effects the data integrity? Is there going to be any data drop out? If the L2 is used as IRAM (not cache).

Thanks and Regards,

Sandeep K

  • This is only an advisory, and not a bug. There will be no data corruption in the DMA transfers. 

    I do not think any Si revisions are planned. 

    In your specific use case you mentioned, since the buffer is on internal memory, it should be fine.

    Hope this helps.

  • Varada,

    Thanks for the response. :)

    I have couple of more questions/confirmations,

    1. If I do not use L2 as RAM and use it as 100% Cache, then is there any possibility of data corruption/drop when i use the McBSP in DMA mode?

    2. Could you please mention the latest Silicon revision (DM6437) available?  

    Thanks and Regards,

    Sandeep K

  • Can someone get the answers for the following?

    1. If I do not use L2 as RAM and use it as 100% Cache, then is there any possibility of data corruption/drop when i use the McBSP in DMA mode?

    2. Could you please mention the latest Silicon revision (DM6437) available?  

  • 1. In such case( when buffer is allocated on DDR), if there are other system masters accessing the DDR, then this EDMA may not get prioritized and hence will not complete in time (if there are real-time requirements). I do not think the data will get corrupted.  

    2. Rev 1.3 is the latest revision.