Hi,
I am using a DM6437 EVM. When I looked into the errata sprz250d, section 2.1.2. It says that the audio packets may be dropped in case of McASP/McBSP, because of the DDR2 latency and the refresh cycle. This can be eliminated by using L2 as RAM. (in this case advisory 1.3.11 comes into picture).
Now, I want to know, is there any silicon revision which has come with bug fixed for this errata?
Basically I am using the McBSP in SPI mode, does the errata mentioned above effects the data integrity? Is there going to be any data drop out? If the L2 is used as IRAM (not cache).
Thanks and Regards,
Sandeep K