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TMS320C6A8168 processor EMAC Interface

Shailendra Pardeshi
Prodigy 80 points

Hi All,

 I am referring to the datasheet of the TMS320C6A8168 processor, EMAC section on page number 205. It is mentioned that “EMAC I/Os operate at 3.3 V and are not compatible with 2.5-V I/O signaling; therefore, only Ethernet PHYs with 3.3-V I/O interface should be used”

 

But Section 6.2 mentions recommended operating conditions as VIH = 2V(MIN) in this case can we use Ethernet PHY whose I/O’s are 3.3V compliant but operates on 2.5V of I/O logic voltage?

 

Regards,

Shailendra.

 

  • 0
    TI__Mastermind 43875 points

    This might work, but it would be in grave danger of being unreliable.

    You would need to check the PHY output characteristics very closely to ensure that they reach 2.0V quickly.

    It would also not leave very much margin for power supply noise, signal noise etc...

    BR,

    Steve

  • 0 in reply to Steve Clynes
    TI__Mastermind 25055 points

    I agree with what Steve said above.  The EMAC IOs on this device are 3.3v IOs. When interfacing such IOs to a 2.5v PHY there are two cases to be considered:

    1. The device transmitting data where the transmit signals switches from 0 to 3.3v, connecting to an IO which is operating at 2.5v.  Depending on the type of PHY used, the 2.5-IO may or may not be able to handle such voltage swings at its input which are above the recommended operating condition and can cause reliability risk.  Additional components may be needed between the device and EMAC PHY to reduce the swing to reasonable levels.
    2. The device receiving data where the receive signal switches from 0-2.5v for the circuit which operates at 3.3v.  In cases where the swing on signals may not be rail-to-rail the receiver may show significant delay compared to the case where the input swings from rail-to-rail, and that can cause functionality fails due to timing issues.

    These are some reasons for recommending using a 3.3v EMAC PHY.

    Regards,
    Marc