• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 101 subscribers
  • Views 435 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6747 interface to 32-bit SDRAM

Lopi
Intellectual 470 points

I am trying to interface a Micron MT48LC4M32B2 SDR SDRAM to the EMIFB on the C6747.  This is a nice part because it has a 32-bit width so I would only need to use a single SDRAM part instead of the usual two (like on the C6747 EVM).  One potential problem is that this SDRAM has only 12 row address bits instead of the 13 specified on page 11 of the EMIFB User Guide (sprufl7a.pdf).  So my understanding is that means I need to run with IBANK_POS=1 in the SDCFG register and set ROWSIZE=3h in SDCFG2.  But, according to the user guide this mode is normally intended for mobile SDRAM not SDR SDRAM.  So when I write to SDCFG2 it is going to issue an LMR command with the EMB_A bits as described in Table 11 of the User Guide.  I'm thinking that I could write to SDCFG2 first, which would configure ROWSIZE but send screwy EMB_A bits, then write to SDCFG to set the proper SDRAM mode bits.  Is this going to work or should I just give-up and go back to a dual 16-bit SDRAM design?  Does anyone have any suggestions for another 32-bit SDRAM part?

Thanks

Lori

  • 0
    TI__Guru 62975 points

    Lori,

    You don't need to worry about setting IBANK and row bits for typical SDRAMs.  Table 3 is a generic explanation for how each pin can potentially be used.  The EMIF will figure out what decode to implement by using your other parameters like word size, bank count, and page size.

    -Tommy

  • 0 in reply to tlee
    Intellectual 470 points

    Tommy,

    But, I don't see how it would know the size of a bank when mapping the addresses.  I can use IBANK in SDCFG to specify that I have 4 banks and PAGE_SIZE to say that I have 256-word pages requiring 8 column address bits.  But how would the DSP know when to switch banks?  It seems to me that really PAGE_SIZE should be called COLUMN_SIZE.  Am I just being stunned?

    Thanks

    Lori

  • 0 in reply to Lopi
    TI__Guru 62975 points

    Lori,

    Sorry, I meant to say that you do not have to program IBANK_POS.  You would definitely need IBANK for the EMIF to know how many banks you have.

    Table 15 shows how logical addresses are mapped to the memory pins when IBANK_POS=0.  The way EMIF traverses the memory topology is by Columns -> Banks -> Rows.  It switches banks as soon as the column addresses are exhausted for each bank.  Note that in this approach EMIF doesn't really need to know how many rows there are.  If the user tries to access an address outside of the physical memory range, the access will loop around to the beginning of the memory.

    -Tommy

  • 0 in reply to tlee
    Intellectual 470 points

    Tommy,

    Ok, just to put this in my own words:
    1.  Based on the logical address the EMIF decides which row is needed. 
    2.  The EMIF sends an ACTV command to open the appropriate row.
    3.  The EMIF send a READ or WRITE command with the appropriate bank and column address to the opened row.
    4.  When the logical address crosses a page boundary (in my case 256 bytes), the EMIF increments the bank number and wraps the column number.
    5.  When the logical address crosses the page boundary for the last bank, the open row is closed and the next row is opened (in my case that would be every 256x4 bytes).  It then wraps the column number and bank number.
     
    Because the row is the topmost index in the logical address, the EMIF doesn't need to know the maximum number of rows supported by the SDRAM.  If I exceed the physical addresses supported by the SDRAM (4096rows x 256columns x 4 banks) then the address wraps.  
     
    For the mobile SDRAM you can only have one bank open at a time.  Therefore the EMIF iterates through the memory using Columns->Rows->Banks.  It fills a complete bank before moving to the next, so it needs to know the number of rows in each bank.
     
    Thanks for the help.
    Lori
  • 0 in reply to Lopi
    TI__Guru 62975 points

    Lori,

    That sounds right with the following corrections:

    • Your page boundary is 256 SDRAM words (so 256 x 32-bit words)
    • For mobile SDRAM, the application is not forced to use the IBANK_POS=1 addressing scheme, but it is better suited for low power (I'm fuzzy on the SDRAM details)

    -Tommy