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C6747 MCASP0 and UART1

Other Parts Discussed in Thread: TMS320C6747, TMS320C6745

Hi,

In one of my custom design board (using TMS320C6747) I need to use UART1 and MCASP0 both at the same time, Is this possible ?

I am using the pinmux utility (http://www-s.ti.com/sc/techlit/sprab06.zip) which shows conflicts when I tried to select both of these at the same time.

I have found following(see the picture below) in the TMS320C6745/6747 data sheet.

It says that the all the unused pins of MACASP0/1/2 can be used as GPIO.

I browse through various manuals available with me but could not find out wether it is possible to use MCASP0 and UART1 at the same time or not, and if it is possible what are the control registers I need to take care of ? (PFUNC of MCASP0 ?). If this is possible an example of the same will be greately helpful.

Thanks

Nirav

 

 

  • Nirav,

    Each pin is individually configurable so it is possible to use both peripherals at the same time, however each pin should be given a dedicated purpose/peripheral.  The PinMux tool will select all the pins for a peripheral if it is checked and collisions are compared against checked boxes.

    -Tommy

  • Hi Tommy,

    Thanks for your quick reply, 

     

    I have bits and bytes of information available with me how can I configure this, that is to use UART1 and McASP0 at the same time, but not sure will this work or not, the information is distributed among several manuals and very difficult to put them together as per the requirements.

     

    Here it is (please correct it, if needed)

     

    è     As per the 3323.tms320c6747.pdfattached manual “tms320c6747.pdf”, table 6-17, UART1 receive corresponds to GPIO bank 4 interrupt

    è     As per the attached manual “tms320c6747.pdf”, table 6-17, UART1 transmit corresponds to GPIO bank 5 interrupt

    From the above two points I can conclude that I can use GPIO bank 4/5 interrupt number for UART1 receive/transmit.

     

    è     As per the attached manual 3301.spru041j-MCASP-REF-Guide.pdf “spru041j-MCASP-REF-Guide.pdf” , Point 4.4 and Table 4.5, PINFUNC register data value determines if AXR[n] pin functions as McASP or GPIO. 0 Pin functions as McASP 1 Pin functions as GPIO pin

    è     As per the attached manual “spru041j-MCASP-REF-Guide.pdf” , Point 4.5 and Table 4.6, PINDIR register data value determines if AXR[n] pin functions as an input or output.0 Pin functions as input. 1 Pin functions as output.

    From the above two points in MCASP reference guide, it seems like the corresponding pins (AXR0[9] and AXR0[10]) will work as GPIO and not as UART. Even this McASP manual no where specifies that you can make it to work as UART.

     

    Meanwhile I could use the pinmux utility and configure the pinmux register values such that both of the UART0 and McASP0 should work. See the following screen shot for the exact values of pinumx registers.

     

    It is still not clear how can I configure this. Please guide for the same.

    Nirav

  • Nirav,

    I would think of the device as a SoC where the System Reference Guide and Datasheet in combination explain the "glue logic" whereas the peripheral reference guides explain how the user would program each individual peripheral on its own.

    Interrupts on this family of devices are generated on a module basis, not on a pin basis.  If we consider UART1_RXD as an example, it is muxed with three internal modules: UART1, GPIO, and McASP.  If you look at the DSP interrupt map (in either Section 2 of the System Reference Guide or Section 6 in the Datasheet), you will see individual interrupts for each of these three modules.

    For UART, GPIO, and McASP examples, you can look at these packages:

    -Tommy