This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

66AK2G12: ePWM exception on register read

Part Number: 66AK2G12
Other Parts Discussed in Thread: SYSBIOS

Hello,

I am trying to generate a PWM signal on the eHRPWM3_A output of the 66AK2G12. I have only just begun writing the code; so far I have only attempted to write to two of the ePWM configuration registers. Here is the function I have written:

#include "board/board_internal.h"
#include <ti/csl/csl_types.h>
#include <ti/csl/src/ip/epwm/V0/csl_epwm.h>
#include <ti/csl/src/ip/epwm/V0/hw_pwmss_epwm.h>
#include <ti/csl/soc/k2g/src/cslr_soc_baseaddress.h>
#include <stdint.h>

void lcd_pwm_init(void)
{
    int32_t result;
    const uint32_t module_clock = 100E6;     // 100 Mhz
    const uint32_t timebase_clock = 12500E3; // 12.5 MHz
    const uint32_t pwm_freq = 25E3;          // 25 kHz

    CSL_BootCfgUnlockKicker();

    // Configure the clock divider of the Time Base module.
    CSL_epwmTbTimebaseClkCfg(CSL_PWM_3_CFG_REGS, timebase_clock, module_clock);

    // Configure the PWM frequency.
    CSL_epwmTbPwmFreqCfg(CSL_PWM_3_CFG_REGS,
                         timebase_clock,
                         pwm_freq,
                         CSL_EPWM_TB_COUNTER_DIR_UP,
                         CSL_EPWM_SHADOW_REG_CTRL_DISABLE);

    CSL_BootCfgLockKicker();
}

The function CSL_epwmTbTimebaseClkCfg performs a read-modify-write of the EPWM_TBCTL register for ePWM 3. When I single-step through the code, an exception occurs at the moment the hardware register is read.

What am I doing wrong?

Thank you.

Andy

  • Hi Andy,

    Can you please share the actual address that you are trying to modify for EPWM_TBCTL register for ePWM3?

    Is this access from A15 or DSP? Are you able to read it via CCS using memory window?

    I assume you are accessing below register address (0x021D 0C00) for the read, please confirm:

  • Yes, the register address is (0x021D 0C00), EPWM_3_EPWM_TBCTL. This code is running on the A15. If I hover my mouse over the value at that address, a little pop-up gives the error, "Address 0x21d0c00; CPU View: Target failed to read 0x021D0C00." The Registers window for EPWM_3, however, shows the value 0x0083, which I believe is the reset value for that register, and which I would expect to be the value it contains.

    Here is the state just prior to clicking the Step Into button:

    You can see in the disassembly window that the PC is on the instruction to read the register: ldrh r7, [r6]. When I click the green Assembly Step Into button, the window changes to this:

  • Hi Andy,

    It looks like Data abort operation to me, which is typical if you do not have the ePWM registers under the MMU table.

    You can update your BIOS cfg file for the application to have ePWM registers

    Sample: (Please update it for your need accordingly):

    var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache');
    var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu');

    /* Enable the cache */
    Cache.enableCache = true;

    // Enable the MMU (Required for L1/L2 data caching)
    Mmu.enableMMU = true;

    // descriptor attribute structure
    var peripheralAttrs = new Mmu.DescriptorAttrs();

    Mmu.initDescAttrsMeta(peripheralAttrs);

    peripheralAttrs.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor
    peripheralAttrs.noExecute = true; // not executable
    peripheralAttrs.accPerm = 0; // read/write at PL1
    peripheralAttrs.attrIndx = 1; // MAIR0 Byte1 describes
    // memory attributes for
    // each BLOCK MMU entry

    // Define the base address of the 2 MB page
    // the peripheral resides in.
    var peripheralBaseAddrs = [
    { base: 0x4ae00000, size: 0x00100000 }, // PRM
    { base: 0x02530C00, size: 0x00000400 }, // UART 0 regs
    { base: 0x02531000, size: 0x00000400 } // UART 1 regs
    { base: 0x021D0000, size: 0x00002000 } // ePWM, eCAP regs
    ];

    // Configure the corresponding MMU page descriptor accordingly
    for (var i =0; i < peripheralBaseAddrs.length; i++)
    {
    for (var j = 0; j < peripheralBaseAddrs[i].size; j += 0x200000)
    {
    var addr = peripheralBaseAddrs[i].base + j;
    Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
    }
    }