Other Parts Discussed in Thread: TPS65218
We stumbled across something strange while testing the power down sequence of the PMIC. What we basically saw was an uncontrolled shutdown of rail DCDC3. We couldn’t figure out why until we did a register dump of the PMIC and saw that register 0x23 has a 70h instead of a 75h (disabling the controlled sequence of shutdown of DCDC3). Once we forced this bit back to 75h the shutdown sequence was correct. After investigating further we see that 75h is there at u-boot (after a power cycle), but somewhere the register gets changed to 70h after booting (at kernel level). We are trying to figure out where and why this is being changed at the kernel level.
Doesn’t make sense for a change to occur at kernel level. Doesn’t make sense to make that rail uncontrolled either.
PS: As a sanity check, we checked the starter kit eval and saw the same thing.
Any ideas as to where and why this is being changed at kernel level?