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Calculation of the interruption time of Timer ( SYS / BIOS ) - C6748

2308.DSP_Teste7_SYS_BIOS.zip

Hello.

How do I calculate the interrupt time of a timer set by SYS / BIOS?

I have a sample project attached , where :

CPU Freq = 300MHz

Timer Period = 500

PeriodType = MICROSECS

1 ) In this configuration, using the simulator, the timer interrupt occurs every 96,000 cycles .  The value that I expected was 150,000 cycles , since ( 1/300MHz ) * 500us = 150,000 cycles .

2 ) Changing the configuration of PeriodType = COUNTS, the same operation will be completed in 4000 cycles .

Thanks .

Rafael

 

  • Rafael,

    Please see Figure 6-1 Overall Clocking Diagram in the System Reference Guide (http://www.ti.com/lit/pdf/sprugj7).  You will see the reference clocks for the TIMER modules there.

    -Tommy

  • Ok Tommy , thank you , but I understand that in the configuration described above and the figure below, should be generate a timer interrupt for each 500us .

    And 500us means 150,000 cycles for a cpufreq = 300MHz .

    Or am I wrong?

    Thanks.

  • Rafael,

    Now that I see your screenshot, I'm not sure if my answer below is what you are looking for, but it may help explain some observations.

    The TIMER modules have different reference clock sources on this device, hence the clocking diagram.  TIMERs 0 and 1 both use AUXCLK (device input clock) as the reference frequency, whereas TIMERs 2 and 3 can be configured to use PLL0/2 or PLL1/2 as the reference frequency.

    Since you have TIMER1 pulled up in the picture, we can use that as the example.  If the device has a 24MHz input clock and you want an interrupt at 500us, the number of cycles would be 24MHz x 500us = 12,000 TIMER cycles.

    If you are observing something different, it may be because 1) BIOS is configuring TIMER in a manner which is different from what we expect and we can verify that by reading the TIMER registers, or 2) the simulator may be configured differently.

    -Tommy

  • Rafael --

    The simulator timer runs at 50MHz.  You can change the simulator .cfg file to be 25MHz.  Unfortunately, the simulator's clock input frequency can only be a divisor of the CPU frequency.

    From C:\Program Files\Texas Instruments\ccsv5.0.1.00036\ccsv5\ccs_base_5.0.1.00036\simulation\bin\configurations\tisim_c6747_ca.cfg

     

            // Clock divide ratio
            // The Clock freq is always fixed to be 50MHz.
            // Core is running at 300Mhz hence the divide ratio is 6
            CLOCK_DIVIDE 6;

            // Clock divide ratio
            // Uncomment this line to run the Timer at 25 MHz.
            // Core is running at 300Mhz hence the divide ratio is 12
            // CLOCK_DIVIDE 12

    You should be able to change that 24000000 input frequency to 50000000 and get what you expect.

    See this post for related info:

    http://e2e.ti.com/support/embedded/f/355/p/96179/338489.aspx#338489

  • Karl and Tommy

     

    His answers did not solve my problem, but it were fundamental.  I solved through their responses.

    My simulator uses the file "tisim_c674x_ca.cfg”.  In this file has the following configuration:

     

    / / Clock divide ratio

    CLOCK_DIVIDE 8 ;

     

    I changed to :

    CLOCK_DIVIDE 1;

     

    Now , with the setup I described (CPU Freq = 300MHz ; Timer Period = 500 ; PeriodType = MICROSECS ) the timer interrupt is generated every 12,000 cycles , ie (1 / 24000000) * 12000 = 500us .  Exactly the expected value.

     

    Changing the Setup to "PeriodType = Counts" I have a timer interrupt every 500 cycles.

     

    Thank you for your help .