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TMDX654IDKEVM: Start and end codes for Sony?

Part Number: TMDX654IDKEVM

We are trying to interface the AM65x with a Sony IMX264 camera sensor. We are lead to believe this should work but I am uncertain what the Start and End frame codes should be because the Sony datasheet doesn't specify start or end of frame codes. Are you able to confirm if this should work and if so what the setting need to be?

When I run my code using the Sony line invalid codes (see Sony sync codes below) for the SoF\EoF I receive and raw IRQ EOX not received. I assume EOX means end of frame. 

  • forgot to add this

     

    CSL_CAL_LVDSRX_CAM1_SYNCSOF - Start of frame code

    ???

    CSL_CAL_LVDSRX_CAM1_SYNCEOF - End of frame code

    ???

    CSL_CAL_LVDSRX_CAM1_SYNCSOL - Start of line code 

    0x800

    CSL_CAL_LVDSRX_CAM1_SYNCEOL - End of line code

    0x9D0

    CSL_CAL_LVDSRX_CAM1_SYNCSOV - Start of blanking

    0xAB0

     

    IMX 264 Sync Codes

    1st Code

    2nd Code

    3rd Code

    4th Code

    12bit

    12 bit

    12 bit

    12 bit

    Start of Valid Line

    0xFFF

    0x000

    0x000

    0x800

    End of Valid Line

    0xFFF

    0x000

    0x000

    0x9D0

    Start of Invalid Line

    0xFFF

    0x000

    0x000

    0xAB0

    End of Invalid Line

    0xFFF

    0x000

    0x000

    0xB60

     

    The CAM1 configuration is set up like this

     

     

  • Ajart, 

    I assume you are trying to use the PDK CAL in row mode to accept data from IMX264. I looked at the IMX264 datasheet and did not see any definition of SOF than it is using standard SAV/EAVs to signal active video. So I assume you need to double checking the pixel format format configuration to match to the IMX264, as incorrect timing can result this error.  

    Can you also confirm which PDK version you are using, and if you have looked at pdk CAL API documentation, at:

       pdk/packages/ti/drv/cal/docs/doxygen/html/index.html

    regards. 

    jian

  • Hi Jian,

    Can you explain what you mean by row mode in PDK CAL. I don't think I have seen that mode. We used some of the code in cal_hal.c to setup CAMERARX but I am unaware of any functions in the PDK that would do the same for the LVDS module. Looking at the example cal_capture_test code I can see an enumeration "Fvid2_VideoIfMode" for different camera interfaces but I don't see any code to go along with the FVID2_VIFM_SCH_LVDS.

    This is the configuration we are using for the LVDSRX module. Also we are not using XHS and XVS signals from the sensor. I assume that is correct. 

    Register LVDSRX_CAM1_CFG LVDSRX_CAM1_FRMSIZE LVDSRX_CAM1_MAXWIDTH LVDSRX_CAM1_SYNCSOF LVDSRX_CAM1_SYNCEOF LVDSRX_CAM1_SYNCSOL LVDSRX_CAM1_SYNCEOL LVDSRX_CAM1_SYNCSOV LVDSRX_IRQSTATUS_RAW_1
    Bit field NUM_LANE1 ALIGN DENDIAN FILEN CRCEN SEMDIAN PIX_WIDTH FRSTAT_INIT NUMPHY OP_MODE FRWIDTH LNWIDTH MAXWIDTH SYNCSOF SYNCEOF SYNCSOL SYNCEOL SYNCSOV CAM1_ERR7 CAM1_ERR6 CAM1_ERR5 CAM1_ERR4 CAM1_ERR3 CAM1_ERR2 CAM1_ERR1 CAM1_ERR0 CAM1_EOF CAM1_SOF
    Value 0x4 0x0 (LSB align) 0x1 (big endian) 0 0 (0x1) big endian 0x2 (12bit) 0 1 0x4 (SONY mode) 0x813 (2067 lines*) 0x9A0 (2464 data words in a line) 0x9A0 (2464 pixels in a line) 0x0FFF0800 0x0FFF09D0 0x0FFF0800 0x0FFF09D0 0x0FFF0AD0 1 0 0 0 0 0 0 0 0 1

    *This includes 1 line of frame information because it is regarded as a valid line but I have also tried 2066 with the same result

    Our PDK version is 7.00.00

    We don't have doxygen installed but I can see the documentation in the source code. 

    Kind regards

    David

  • David, 

    I realized there was a typo in my earlier replies, it shall say raw mode. Also apologize for the long delay in response. I will review hardware configuration and CAL driver support with our teams.

    regards

    Jian