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Vijayabharathi,
vijayabharathi chelladurai said:1. Is it possible to use DMA for EMIF in the ADC capture side, as the ADC have SOC,EOC signals?
I'm not familiar with the ADS8364 or the abbrevitations SOC, EOC. Can you clarify what these mean?
vijayabharathi chelladurai said:Is it possible to connect 16 bit ADC output with a GPIO bank for capture instead of EMIF?
Have you referenced the OMAP-L138 Universal Parallel Port (uPP) peripheral? This might be exactly what you are looking for.
Hi Drew
Thanks for the reply.
>>I'm not familiar with the ADS8364 or the abbrevitations SOC, EOC. Can you clarify what these mean?
SOC - Start of conversion. There is a signal in the ADC Chip namely Hold which has to be made lo for min 20 ns and then made high.
EOC -End of conversion This is interrupt to the processor,,so that processor will identify that conversion in ADC finished, and processor will read after acquitstion time
So i think some need for hardware circuitry to control automatically, when processor reads automatically through DMA? Is my understanding correct. KIndly advise me
In my application i have 3 channel input, which is simultaneous sampled by the above ADC and digital value will be captured by the processor, written in SATA in some structure. We are planning to operate this ADC in FIFO mode . KIndly advise us
We will check the uPP regarding the use
Regards
Vijayabharathi C
Thanks.
vijayabharathi chelladurai said:So i think some need for hardware circuitry to control automatically, when processor reads automatically through DMA? Is my understanding correct.
It certainly sounds like the ADS8364 needs some hardward signals to interface to, however the ADS8364 datasheet should provide you with details of all the signals needed to work with a processors. The uPP has an integrated DMA that can be used to transfer the captured data into memory. The device has a good number of GPIO's that can be used to interface to the ADC.
vijayabharathi chelladurai said:In my application i have 3 channel input, which is simultaneous sampled by the above ADC and digital value will be captured by the processor, written in SATA in some structure. We are planning to operate this ADC in FIFO mode . KIndly advise us
This sounds like a typical use case, however it would be best to ask questions on the specifics of the ADC in the Data Converters Forum as they are the experts as the use case of the ADC.