Hi experts,
I'm working on a custom board of TDA4VM and the boot flow is SBL -> SPL(Main R5) -> U-Boot - > Linux.
Everything works well except that kernel hangs during reboot and I have no idea with it.
Below is the log.

This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi experts,
I'm working on a custom board of TDA4VM and the boot flow is SBL -> SPL(Main R5) -> U-Boot - > Linux.
Everything works well except that kernel hangs during reboot and I have no idea with it.
Below is the log.
Also, I see issue with the flow you have mentioned: SBL -> SPL(Main R5) -> U-Boot - > Linux. SPL can not run on MAIN R5F.
Regards,
Karan
I tried to do a "reboot" on SDK7.3 and it works fine for me. See attached logs.
Although it took a couple of seconds for it to happen.
Regards,
Karan
Logs: reboot_sbl_linux.log
Hi Karan,
I'm using SDK 7.2 and this problem is resolved by local support team with a patch for SBL.
Thanks.
Thanks for the confirmation.
Please do post the patch here, I tested on SDK7.3 so things might have been fixed there.
Regards,
Karan
Content is attached.
From dcb80815bd2fec01845401b4ea42befb4d3c1116 Mon Sep 17 00:00:00 2001 From: joe <joe.shen@ti.com> Date: Fri, 22 Jan 2021 18:16:35 +0800 Subject: [PATCH] [sbl]it can not bypss DDR PLL after warm reset Signed-off-by: joe <joe.shen@ti.com> --- packages/ti/boot/sbl/board/k3/sbl_main.c | 55 ++++++++++++++++++++++-- 1 file changed, 51 insertions(+), 4 deletions(-) diff --git a/packages/ti/boot/sbl/board/k3/sbl_main.c b/packages/ti/boot/sbl/board/k3/sbl_main.c index ebcb272..80faab4 100644 --- a/packages/ti/boot/sbl/board/k3/sbl_main.c +++ b/packages/ti/boot/sbl/board/k3/sbl_main.c @@ -46,6 +46,8 @@ /********************************************************************** ************************** Macros ************************************ **********************************************************************/ +#define PLL12_LOCKKEY0 0x0068C010 +#define PLL12_LOCKKEY1 0x0068C014 /********************************************************************** ************************** Internal functions ************************ @@ -510,14 +531,25 @@ int main() SBL_log(SBL_LOG_MAX, "done.\n"); #endif #if defined(SBL_ENABLE_DDR) && defined(SBL_ENABLE_PLL) && defined(SBL_ENABLE_CLOCKS) && !defined(SBL_SKIP_SYSFW_INIT) SBL_log(SBL_LOG_MAX, "Initlialzing DDR ..."); + + CSL_REG32_WR(PLL12_LOCKKEY0, 0x68EF3490); + CSL_REG32_WR(PLL12_LOCKKEY1, 0xD172BC5A); + + if(!(CSL_REG32_RD(PLL12_LOCKKEY0) & 0x01)) + { + SBL_log(SBL_LOG_MIN, "DDR PLL unlock failed \n"); + } + SBL_ADD_PROFILE_POINT; Board_init(BOARD_INIT_DDR); SBL_log(SBL_LOG_MAX, "done.\n"); #endif -- 2.17.1
Hi Karan,
I‘m meeting a almost problem. Just my psdk is 7.00 and I boot from emmc. It also hangs when reboot.
I want to try the resolution of jianyu. But How do I compile the file what jianyu mention? And which image is the output of this compile?
Regards
Hi,
You can apply this patch and re-compile the SBL you are using.
For example if you are using MMCSD SBL then do the below:
1. Apply the patch on SBL.
2. Clean the SBL
make sbl_mmcsd_img_clean
make sbl_lib_mmcsd_clean
3. Re-build the SBL
make sbl_lib_mmcsd
make sbl_mmcsd_img
4. Use the new SBL image generated.
Regards,
Karan