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YUV16-Bit through BT.1120 Implement on IPNC V2.6

Other Parts Discussed in Thread: TVP7002

Hi all,

I try to use the latest version of IPNC V2.6 to implement 1080P@30 yuv16-bit through BT.1120 passing to DM368. The front-end is a FPGA which generate a color bar the format is yuv422.

It will always send this picture to DM368. So, I refer the YUV mode setting which is yuv8-bit through BT.656 to modify into yuv16-bit through BT.1120.

I refer DM368 datasheet to configure ISIF register to BT.1120 mode. The register dump at below.

 

# ./regrw.out 1c71000 52

 0x01c71000: 00000001 00001000 00000000 00000000                // 0x01c71004   YCbCr 16Bit
 0x01c71010: 00000000 00000001 00000000 00000eff
 0x01c71020: 00000001 00000001 0000043f 0000ffff
 0x01c71030: 000000ff 00000078 00000249 00000418
 0x01c71040: 0000eb80 00000000 00000000 0000b1b1
 0x01c71050: 00000200 00000200 00000200 00000200
 0x01c71060: 00000000 00000000 00000000 00000000
 0x01c71070: 00000424 00000424 00000424 00000000
 0x01c71080: 00007708 00000001 00000910 00000000                // 0x01c71084   REC656 Interface Enable  
                                                                                                                       // 0x01c71088   The data width in CCIR656 input mode 8 bit
 0x01c71090: 00000000 00000000 00000000 00000000
 0x01c710a0: 00000000 00000000 00000000 00000000
 0x01c710b0: 00000000 00000000 0000001f 00000000
 0x01c710c0: 00000000 00000000 00000000 00000000

 

Questions:

1. I want to verify something. If the front-end send the data is wrong whether the capture status will not have interrupt. The meaning is do not capture the picture. Is my view right?

2. How do I set the height and width blanking on 1080P resolution at FPGA side?

3. I think drv_isif.c and avServerUi.c need to modify more but I do not have any idea.

4. Can TI provide a yuv16-bit through BT.1120 a patch for our reference? I know Anshuman has provide the yuv8-bit mode before.

 

Thanks for your help.

 

B.R.

Omin

  • Hi all,

    Can you help me to confirm my bt.1120 setting of isif  that is right?

    I refer tvp7002 driver setting and DM368 datasheet to configure ISIF register to BT.1120 mode. The register dump at below.

    # ./regrw.out 1c71000 52

     0x01c71000: 00000001 00001000 00000000 00000000                // 0x01c71004   YCbCr 16Bit
     0x01c71010: 00000000 00000001 00000000 00000eff
     0x01c71020: 00000001 00000001 0000043f 0000ffff
     0x01c71030: 000000ff 00000078 00000249 00000418
     0x01c71040: 0000eb80 00000000 00000000 0000b1b1
     0x01c71050: 00000200 00000200 00000200 00000200
     0x01c71060: 00000000 00000000 00000000 00000000
     0x01c71070: 00000424 00000424 00000424 00000000
     0x01c71080: 00007708 00000001 00000910 00000000      // 0x01c71084   REC656 Interface Enable  
                                                                                                                 // 0x01c71088   The data width in CCIR656 input mode 8 bit
     0x01c71090: 00000000 00000000 00000000 00000000
     0x01c710a0: 00000000 00000000 00000000 00000000
     0x01c710b0: 00000000 00000000 0000001f 00000000
     0x01c710c0: 00000000 00000000 00000000 00000000

    Thanks so much.

    B.R.

    Omin

  • ISIF-REC656 Interface should be enabled only when BT.656(NTSC/PAL) being input.  Since you want to capture 1080P@30, you should use Generic YCbCr Configuration Signal Interface. Pl refer to section 2.6.1 of dm36x VPFE user guide.

  • Hi Nagabhushana,

    Thanks for your reply.

    Your explanation let me confuse. I follow dm36x VPFE user's guide page 47 to set register for BT.1120 as below.

    But you recommend me to disable REC656 that is contradiction.

    I discover something the tvp7002 register setting on DM365 EVM which is Generic YCbCr Configuration, right?

    I trace the EVM schematic that the tvp7002 HSYNC and VSYNC does not connect to dm365. So, this means if do not connect HSYNC and VSYNC to dm365 which the Generic YCbCr Configuration will swich to BT.1120 mode. Is my view right?

  • ,

    I will get back to you. I need to verify documents for BT.1120 interface.

  • you are correct, your setting ISIF-REC656 register is fine in case of BT.1120. Sorry for confusion from my end. I used my dm365 setup to capture 1080p@60 through tvp7002. I dumped registers, you can compare your register settings with this and figure out what is going wrong. Quick glance, I figured out register offset 0x1c which is meant for pixels per line is suspicious. Also, register offset-0x28. Please take a look.

    CCDC[0] : 3
    CCDC[4] : 1000
    CCDC[8] : 0
    CCDC[c] : 0
    CCDC[10] : 0
    CCDC[14] : 0
    CCDC[18] : 0
    CCDC[1c] : 77f
    CCDC[20] : 1
    CCDC[24] : 1
    CCDC[28] : 437
    CCDC[2c] : ffff
    CCDC[30] : ff
    CCDC[34] : 78
    CCDC[38] : 249
    CCDC[3c] : 43b
    CCDC[40] : 8c00
    CCDC[44] : 0
    CCDC[48] : 0
    CCDC[4c] : 0
    CCDC[50] : 200
    CCDC[54] : 200
    CCDC[58] : 200
    CCDC[5c] : 200
    CCDC[60] : 0
    CCDC[64] : 0
    CCDC[68] : 0
    CCDC[6c] : 0
    CCDC[70] : 0
    CCDC[74] : 21d
    CCDC[78] : 0
    CCDC[7c] : 0
    CCDC[80] : 0
    CCDC[84] : 3
    CCDC[88] : 800
    CCDC[8c] : 0
    CCDC[90] : 0
    CCDC[94] : 0
    CCDC[98] : 0
    CCDC[9c] : 0
    CCDC[a0] : 0
    CCDC[a4] : 0
    CCDC[a8] : 0
    CCDC[ac] : 0
    CCDC[b0] : 0
    CCDC[b4] : 0
    CCDC[b8] : 0
    CCDC[bc] : 0
    CCDC[c0] : 0
    CCDC[c4] : 0
    CCDC[c8] : 0
    CCDC[cc] : 0
    CCDC[d0] : 0
    CCDC[d4] : 0
    CCDC[d8] : 0
    CCDC[dc] : 0
    CCDC[e0] : 0
    CCDC[e4] : 0
    CCDC[e8] : 0
    CCDC[ec] : 0
    CCDC[f0] : 0
    CCDC[f4] : 0
    CCDC[f8] : 0
    CCDC[fc] : 0
    CCDC[100] : 0
    CCDC[104] : 0
    CCDC[108] : 0
    CCDC[10c] : 0
    CCDC[110] : 0
    CCDC[114] : 0
    CCDC[118] : 0
    CCDC[11c] : 0
    CCDC[120] : 0
    CCDC[124] : 0
    CCDC[128] : 0
    CCDC[12c] : 0
    CCDC[130] : 0
    CCDC[134] : 0
    CCDC[138] : 0
    CCDC[13c] : 0
    CCDC[140] : 0
    CCDC[144] : 0
    CCDC[148] : 0
    CCDC[14c] : 0
    CCDC[150] : 0
    CCDC[154] : 0
    CCDC[158] : 0
    CCDC[15c] : 0
    CCDC[160] : 0
    CCDC[164] : 0
    CCDC[168] : 0
    CCDC[16c] : 0
    CCDC[170] : 0
    CCDC[174] : 0
    CCDC[178] : 0
    CCDC[17c] : 0
    CCDC[180] : 0
    CCDC[184] : 0
    CCDC[188] : 0
    CCDC[18c] : 0
    CCDC[190] : 0
    CCDC[194] : 0
    CCDC[198] : 0
    CCDC[19c] : 0
    CCDC[1a0] : 0
    CCDC[1a4] : 0
    CCDC[1a8] : 0
    CCDC[1ac] : 0
    CCDC[1b0] : 0
    CCDC[1b4] : 0
    CCDC[1b8] : 0
    CCDC[1bc] : 0
    CCDC[1c0] : 0
    CCDC[1c4] : 0
    CCDC[1c8] : 0
    CCDC[1cc] : 0
    CCDC[1d0] : 0
    CCDC[1d4] : 0
    CCDC[1d8] : 0
    CCDC[1dc] : 0
    CCDC[1e0] : 0
    CCDC[1e4] : 0
    CCDC[1e8] : 0
    CCDC[1ec] : 0
    CCDC[1f0] : 0
    CCDC[1f4] : 0

  • Hi,

    Omin Chou said:

    1. I want to verify something. If the front-end send the data is wrong whether the capture status will not have interrupt. The meaning is do not capture the picture. Is my view right?

    Capture hardware (ISIF) generates interrupt based on the clock and HSYNC,VSYNC. In your case, as you are using embedded sync mode, the ISIF hardware will determine the embedded sync and generate the interrupts. If you have correctly generated the BT.1120 timings and signalling, then even if active data is wrong, you should get an interrupt.

    Omin Chou said:

    2. How do I set the height and width blanking on 1080P resolution at FPGA side?

    Do you want to know the values you should set? In general the horizontal blanking should be of the order of 64 pixels and vertical blanking of the order of 12-32 lines. I dont know about your FPGA, so i cannot tell how to set the horizontal and vertical blanking.

    Omin Chou said:

    3. I think drv_isif.c and avServerUi.c need to modify more but I do not have any idea.

    Yes, and you would need to modify the corresponding imager/input device driver.

    Omin Chou said:

    4. Can TI provide a yuv16-bit through BT.1120 a patch for our reference? I know Anshuman has provide the yuv8-bit mode before.

    I am not sure if we are going to have BT.1120 support anytime soon in IPNC software package. We had added BT.656 support in the latest release for customers to integrate the D1 resolution video decoders. But in general the guidelines to integrate the BT.656 video input should be valid for BT.1120 input as well.

    Regards,

    Anshuman

    PS: Please mark this post as verified, if you think it has answered your question. Thanks.

     

  • Hi Nagabhushana and Anshuman,

     

    Currently, I can catch the stream correctly.

    Thanks so much for your comments.

     

    B.R.

    Omin

     

  • Hi

       I ran into the same problem, can you help me to send bt.1120 setting of isif register to me. dang_qian@163.com

    Thanks for your help.

    dq