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AM6442: Power-up/down Sequence

Part Number: AM6442

Hi,

My customers are checking the power-up/down sequence for AM64x.

https://www.tij.co.jp/jp/lit/ds/symlink/am6442.pdf

DS

Figure 7-3. Power-Up Sequencing

Figure 7-4. Power-Down Sequencing

Question 1:

Does this figure show that VDD_CORE can be turned on early?

Question 2:

What is the difference between hatched are and gray areas?

 

Regards,

Rei

  • 1) I assume you are asking if VDD_CORE can ramp up before the power rail sourcing VDDS_DDR and VDDS_DDRC based on the circled portion of waveforms included with your question.  If so, the answer is yes.

    2) The shaded region of the waveform represents a range of time where a supply may ramp up/down relative to other supply rails.  The hatch marks within a shaded region is used to represent multiple power rails just in case all power rails represented by a waveform are not powered from the same source. For example, there may be a reason to power some 1.8V power rails form one source while other 1.8V rails are powered from another source.

    Regards,
    Paul

  • Hi Paul,

    Thank you very much. I'm sorry, I have another question.

    I think that if we don't need eFuse function, we don't have to supply to VPP_CORE.

    Is it right?

    Regards,

    Rei

  • This question is addressed in the datasheet Recommended Operating Conditions for OTP eFuse Programming table.

    The description "Supply voltage for the eFuse ROM domain during normal operation without hardware support to program eFuse ROM" has a value of "NC" with a reference to Note 2 at says "NC stands for No Connect.

    So the VPP pin is a no connect when you are not planning to program eFuse ROM.

    Regards,
    Paul