TDA4VM: TDA4 Ethernet questions

Hi,

See replies

A. What's the difference of CPSW / GMAC / ICSSG on the TDA4? 

TI > By CPSW I guess you mean CPSW 9G, it's a newer switch IP catering mainly to the automotive market. It has 8 physical ports and 1 host port (software). It supports TSN features, VLAN and switching etc. By GMAC I think you are referring to the MCU Ethernet port which has only 1 physical port and 1 host port (software). 

If you see the EVM, there is a single MCU Ethernet port on the base EVM while there CPSW 9G ports are only available through the GESI or QSGMII extension card.

ICSSG is a different IP altogether, it's a SW based EMAC and switch. Although ICSSG IP is available on TDA4, the SDK does not support ICSSG, if ICSSG support is desired then AM65x is the SoC to consider.

But if the HW is naming the CPSW9G, then, are you saying those 9 ports can be set as all accessing them (9 ports) thru all CPSW?

TI> See my reply above. There are 8 ports for CPSW 9G, the lone port on base EVM belongs to MCU Ethernet which is a separate IP altogether.

CPSW9G (9 hw ports) can be set all accessing by 9 CPSW or 9 GMAC or 9 ICSSG IP drivers?

TI > No, see my reply above. These are different IP's entirely.

Any more detail documents?

TI > You can refer to this documentation

D. May you explain why the board_ethernet_config.c is written as this?

TI > Each ICSSG instance has two ports and they can operate individually as two EMAC ports. You can probably go through this training to understand ICSSG better, but as mentioned above, it's better to use another SoC like AM65 if you want to use ICSSG.

What is NUSS?

TI> NUSS refers to the Network Sub System and is a generic terms for the HW switch fabric.

Board_gPruicssMdioInfo and Board_cpswMdioInfo refer to the MDIO structures for PRU-ICSS and CPSW, MDIO needs the PHY address to access and talk to the respective PHY's.

Regards

Vineet

Hi Vineet:

Thanks for review / discussing regarding the customer's topology, I will talk with my customer and feedback their comments hereafter.

plz wait.

Thanks.

BR Rio

Hi Roy:

More questions after discussing with my customers:

Q1.: in this link, https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/psdk_rtos/docs/user_guide/developer_notes_ethfw.html

       There is a patch in the bottom side: ethfw_qsgmii_sdk7p1.zip

       So, if the customer is using RGMII, there is no need to use this patch, right?

Q2: In this PDF: https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/ethfw/docs/EthFw_Getting_Started.pdf

       There is an ETH switch config tool, where is it to download?

       ==> Ethernet Switch – Switch Configuration

Q3. in this slide, https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/ethfw/docs/user_guide/demo_ethfw_combined_top.html

      If all the CPSW9G is controlled by R5F, and if the customer changes their MDIO/RGMII pin, do we/they need to rebuild the R5F fw?

      If yes, how?

Q4, the document said: 

The current version of Enet LLD includes the following PHY drivers:

• Generic PHY driver.
• TI DP83867 RGMII PHY driver.
• TI DP83822 RMII PHY driver.
• VSC8514 QSGMII PHY driver

So, if the customer changes their Phy, they need to disable those 4 drivers, and re-merge the new phy drivers, right?

And how to rebuild the LLD driver in the Linux ubuntu?

Q5. As our discussion, there is no need to modify the CPSW9G in the Linux DTSI, we only need to modify the RTOS part.

      And where is the MDIO/RGMII pinmux file we need to modify? Where is the path of that files and names?

BR Rio

Hi Rio,

See replies inline

Q1> So, if the customer is using RGMII, there is no need to use this patch, right?

TI : That's correct

Q2> There is an ETH switch config tool, where is it to download?

TI : There is a python based configuration tool under <SDK_INSTALL_PATH>\pdk\packages\ti\drv\enet\tools\cpsw_configclient

Q3> If all the CPSW9G is controlled by R5F, and if the customer changes their MDIO/RGMII pin, do we/they need to rebuild the R5F fw?  If yes, how?

TI : Take a look at this link within Ethernet Firmware User Guide

Q4> So, if the customer changes their Phy, they need to disable those 4 drivers, and re-merge the new phy drivers, right? And how to rebuild the LLD driver in the Linux ubuntu?

TI : Yes, customer needs to write their custom PHY driver if they are using a 3P PHY. See this documentation on how to write a PHY driver.

The 4 drivers you mentioned are just examples, they are not active at the same time. EVM uses the PHY DP83867 for RGMII and that's what is supported out of the box.

If you build Ethernet Firmware it will also build the LLD.

Q5> And where is the MDIO/RGMII pinmux file we need to modify? Where is the path of that files and names?

You can read up on the Ethernet Firmware integration guide it talks about MDIO, even mentions the API's used.

Pinmuxing is done by the PDK board init routines (see this guide) which is called by the Ethernet Firmware function EnetBoard_initEthFw() in <SDK_INSTALL_DIR>\ethfw\apps\app_remoteswitchcfg_server\mcu_2_0\main_tirtos.c. It's defined in the LLD at <SDK_INSTALL_PATH>\pdk\packages\ti\drv\enet

Regards

Vineet

Hi Vineet:

plz wait our discussion with customer.

BR Rio