This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5728: RTOS PDK RAM configuration

Part Number: AM5728

Hi,

We are working on a custom board based on AM5728.  Our custom board has 4 GB RAM.

We are doing changes for custom board in RTOS PDK.

We have generated emif gel configuration from EMIF Config Tool (Attached). We haven't find all inputs from EMIF Tool to update following file 

pdk_am57xx_1_0_17/packages/ti/board/src/evmAM572x/evmAM572x_ddr.c

How to update following parameters ?

ddr3Config2.emifDdrPhyParam.gateLevelInitMode = 0x01U; 
ddr3Config2.emifDdrPhyParam.fifoWeInDelay = 0x0U; 
ddr3Config2.emifDdrPhyParam.ctrlSlaveDelay = 0x0U;
ddr3Config2.emifDdrPhyParam.readDqsSlaveDelay = 0x0020U;
ddr3Config2.emifDdrPhyParam.writeDqsSlaveDelay = 0x0060U;
ddr3Config2.emifDdrPhyParam.writeDataSlaveDelay = 0x80U;

ddr3Config2.emifDdrPhyParam.gateLevelRatio = 0x00U;
ddr3Config2.emifDdrPhyParam.writeLevelInitRatio = 0x00;
ddr3Config2.emifDdrPhyParam.writeDqsSlaveRatio = 0x60U;
ddr3Config2.emifDdrPhyParam.fifoWeSlaveRatio = 0xBBU;
ddr3Config2.emifDdrPhyParam.useRank0Delays = 1U;

ddr3Config2.emifDdrPhyParam.gateLevelNumDq0 = 0xFU; 

uint32_t emifPhyDllLockDiff = 0x10U; /* Bit[17:10] */
uint32_t emifPhyFastDllLock = 0U; /* Bit[9] */ 

hEmif->regs->OCP_CONFIG = 0x0A500000U; 
hEmif->regs->DLL_CALIB_CTRL = 0x00050000U; 
hEmif->regs->DLL_CALIB_CTRL_SHADOW = 0x00050000U; 
hEmif->regs->READ_WRITE_LEVELING_RAMP_CONTROL = 0x80000000; 

hEmif->regs->COS_CONFIG = 0x00FFFFFFU; 

Please find EMIF Config file attached.

6518.EMIF_RegisterConfig.zip