AM3517 DVI documentation needed.

Amy Garcia said:

We plan to interface AM3517 with the FPGA. Since both SDI serial interface and the parallel RFBI interface are not supported as it was mentioned in this document:

http://processors.wiki.ti.com/index.php/AM35x-OMAP35x-PSP_03.00.00.04_DataS

 we plan to use a Parallel Interface in Bypass Mode (MIPI DPI Protocol) (page 1195 in the Technical Ref Manual for AM35x ARM Microprocessor).

This sounds reasonable, the parallel display interface should do well communicating with a FPGA.

Amy Garcia said:

 My task is to simulate this 720p DVI Interface over a Parallel bus in FPGA.

That is why I am looking for its timing diagram.

The timing diagrams for the parallel interface in bypass mode are given in figure 12-17 through figure 12-32 of the TRM, starting on page 1204. I don't believe we have unique timing diagrams for various resolutions such as 720p, but you could take the settings used in the 720p configuration and substitute them into the timing diagrams from the TRM.