My question involves the use of LPDDR memory and the TMS320C6X (C6748/OMAP-L138) dsp evaluation board design. In the design there is the use of 22 ohm series resistors and I believe that they are used near the dsp controller for the DQ lines. A 50 ohm characteristic impedance is used for the DQ transmission line. So far I've been told that the drive strengths used for the developement board for both the controller and memory are full strenght. I believe this equates to 25 ohms output impedance for the drivers. So the 22 ohms makes sense for transmission in one direction but not the other when considering the correct termination for the transmision line should be about 50 ohms. What am I missing? Does full strenght mean that both the controller and the memory have driver output impedances of 25 Ohms? Im not to familiar with LPDDR interfaces but I do know that a matched transmission line is what is desired for high speed signals.