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interrupt with omap3530 camera controller(BT656)

Other Parts Discussed in Thread: OMAP3530, TVP5146

hi
recently i am porting the camera to android.i have some problems with camera(omap3530).hope somebody can give me an advice.thank you.
1:my setting:
    the follows blow is the setting i made:
1.1 i use the bt656 format with 8 data lines and a pclk line connected to omap3530 camera controller(D0--D7).
1.2 the bt656 data is produced by a decoder(cx25837) similar to tvp5146.
1.3 a key configure c source code is blow:

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/i2c.h>
#include <linux/gpio.h>
#include <linux/mm.h>

/*Include V4l2 ISP_Camera driver related header file*/
#include <../drivers/media/video/omap34xxcam.h>
#include <../drivers/media/video/isp/ispreg.h>

#include "board-omap3beagle-camera.h"
#include "mux.h"

#ifndef CAMERA_DEBUG
#define CAMERA_DEBUG 1
#endif



static struct omap34xxcam_hw_config decoder_hwc = {
    .dev_index        = 0,
    .dev_minor        = 0,
    .dev_type        = OMAP34XXCAM_SLAVE_SENSOR,
    .u.sensor.sensor_isp    = 1,
    .u.sensor.capture_mem    = PAGE_ALIGN(720*625*2*4),//PAL
};

static struct isp_interface_config cx25837_if_config = {
    .ccdc_par_ser        = ISP_PARLL_YUV_BT,
    .dataline_shift        = 0x0,
    .hsvs_syncdetect    = ISPCTRL_SYNC_DETECT_VSRISE,
    .strobe            = 0x0,
    .prestrobe        = 0x0,
    .shutter        = 0x0,
    .wait_hs_vs        = 2,
    .u.par.par_bridge    = 0x0,
    .u.par.par_clk_pol    = 0x0,
};

#define CX25837_XCLK_BT656         (27000000)
#if 1
static struct v4l2_ifparm ifparm = {
    .if_type = V4L2_IF_TYPE_BT656,
    .u      = {
        .bt656 = {
            .frame_start_on_rising_vs = 1,
            .bt_sync_correct = 0,
            .latch_clk_inv    = 0,
            .nobt_hs_inv    = 0,    /* active high */
            .nobt_vs_inv    = 0,    /* active high */
            .mode        = V4L2_IF_TYPE_BT656_MODE_BT_8BIT,
            .clock_min    = CX25837_XCLK_BT656,
            .clock_max    = CX25837_XCLK_BT656,
        },
    },
};
#else
static struct v4l2_ifparm ifparm = {
    .if_type = V4L2_IF_TYPE_YCbCr,
    .u = {
        .ycbcr = {
            .frame_start_on_rising_vs = 1,
            .bt_sync_correct = 0,
            .swap = 0,
            .latch_clk_inv = 0,
            .nobt_hs_inv = 0, /* active high */
            .nobt_vs_inv = 0, /* active high */
            .clock_min = CX25837_XCLK_BT656,
            .clock_max = CX25837_XCLK_BT656,
        },
    },
};
#endif

static int cx25837_ifparm(struct v4l2_ifparm *p)
{
    if(p == NULL){
        return -EINVAL;
    }

    *p = ifparm;
    return 0;
}

static int cx25837_set_prv_data(struct v4l2_int_device *s, void *priv)
{
    struct omap34xxcam_hw_config *hwc = priv;

    if (priv == NULL)
        return -EINVAL;

    hwc->u.sensor.sensor_isp = decoder_hwc.u.sensor.sensor_isp;
    hwc->u.sensor.capture_mem = decoder_hwc.u.sensor.capture_mem;
    hwc->dev_index = decoder_hwc.dev_index;
    hwc->dev_minor = decoder_hwc.dev_minor;
    hwc->dev_type = decoder_hwc.dev_type;
    return 0;
}

static int cx25837_power_set(struct v4l2_int_device *s, enum v4l2_power power)
{
    struct omap34xxcam_videodev *vdev = s->u.slave->master->priv;

    printk("cx25837_power_set\n");
    switch (power) {
    case V4L2_POWER_OFF:
        /*can add some codes as you like here*/
        break;

    case V4L2_POWER_STANDBY:
        /*can add some codes as you like here*/
        break;

    case V4L2_POWER_ON:
        /*can add some codes as you like here*/       
        isp_configure_interface(vdev->cam->isp, &cx25837_if_config);
        break;

    default:
        return -ENODEV;
        break;
    }
    return 0;
}

static struct cx25837_platform_data cx25837_pdata = {
    .master            = "omap34xxcam",
    .ifparm            = cx25837_ifparm,
    .power_set        = cx25837_power_set,
    .priv_data_set     = cx25837_set_prv_data,
    .clk_polarity    = 0,
    .hs_polarity    =1,
    .vs_polarity    =1,
};

static struct i2c_board_info __initdata cx25837_i2c_board_info = {
    I2C_BOARD_INFO("cx25837",0x45),//the i2c chip address(7-bits) of cx25837
    .platform_data = &cx25837_pdata,
};

#define CX25837_RESET 167
#define CX25837_SLEEP 98

static  int omap3beagle_pin_mux_config(void)
{   
    int err = 0;;
    //mux the ball F18 as gpio(167)
    //check wether the gpio167 has been requested?   
    err = gpio_request(CX25837_RESET, "cx25837_reset");
    if(err){
        printk("the goio %d you apply has been requested!\n",CX25837_RESET);
        return -1;       
    }
    //mux the ball F18 as gpio(gpio167)
    omap_mux_init_gpio(CX25837_RESET,OMAP_PIN_OUTPUT);

    //set the gpio167 as output
    gpio_direction_output(CX25837_RESET,0);

#if CAMERA_DEBUG
    gpio_set_value(CX25837_RESET,0);
#endif   

    err = gpio_request(CX25837_SLEEP, "cx25837_sleep");
    if(err){
        printk("the goio %d you apply has been requested!\n",CX25837_SLEEP);
        return -1;       
    }
    //mux the ball H24 as gpio(gpio98)
    omap_mux_init_gpio(CX25837_SLEEP,OMAP_PIN_OUTPUT);

    //set the gpio98 as output
    gpio_direction_output(CX25837_SLEEP,0);

#if CAMERA_DEBUG
    gpio_set_value(CX25837_SLEEP,0);
#endif     
 
    return 0;
}


static int before_init(void)
{
    int err;
    err = omap3beagle_pin_mux_config();
    if(err == -1){
        printk("omap3beagle_pin_mux_config failed\n");
        return -1;
    }   
    //here,you may add some code in the further
   
    return 0;
}

static void after_init(void)
{
    //here,you may add some code in the further
}

#define CX25837_I2C_BUSNUM 2   //the cx25837 is connected to the i2c2 controller
int __init omap3beagledc_init(void)
{
    printk("omap3 beagleboard camera(a i2c_client init is beaginning\n)");

    before_init();
    i2c_register_board_info(CX25837_I2C_BUSNUM,&cx25837_i2c_board_info,1);
    after_init();   
       
   
    printk("omap3 beagleboard camera (a i2c_client init is over\n)");
    return 0;
}

arch_initcall(omap3beagledc_init);

1.4 the camera registers setting is blow:

----isp iomem register----

base address: 0x480B C000
address:0x0,data:0x20
address:0x4,data:0x2000
address:0x8,data:0x1
address:0xc,data:0x80083311
address:0x10,data:0x80000000
address:0x14,data:0x0
address:0x18,data:0x80000000
address:0x1c,data:0x0
address:0x20,data:0x0
address:0x24,data:0x0
address:0x28,data:0x0
address:0x2c,data:0x0
address:0x30,data:0x0
address:0x34,data:0x0
address:0x38,data:0x0
address:0x3c,data:0x0
address:0x40,data:0x29c110
address:0x44,data:0x0
address:0x48,data:0x0
address:0x4c,data:0x0
address:0x50,data:0x0
address:0x54,data:0x0
address:0x58,data:0x0
address:0x5c,data:0x0
address:0x60,data:0x0
address:0x64,data:0x0
address:0x68,data:0x10000
address:0x6c,data:0x0

---isp ccdc register----

base address: 0x480B C600


address:0x0,data:0x1fe01
address:0x4,data:0x1
address:0x8,data:0x32f84
address:0xc,data:0x0
address:0x10,data:0x0
address:0x14,data:0x59f
address:0x18,data:0x20002
address:0x1c,data:0x11f
address:0x20,data:0xffff00ff
address:0x24,data:0x5a0
address:0x28,data:0x249
address:0x2c,data:0x1000
address:0x30,data:0x10
address:0x34,data:0x0
address:0x38,data:0x0
address:0x3c,data:0x4
address:0x40,data:0x0
address:0x44,data:0x0
address:0x48,data:0x11f0032
address:0x4c,data:0x4
address:0x50,data:0x3
address:0x54,data:0x8800
address:0x58,data:0x4000
address:0x5c,data:0x0
address:0x60,data:0x0
address:0x64,data:0x0
address:0x68,data:0x2f840000
address:0x6c,data:0x0
address:0x70,data:0x0
address:0x74,data:0x0
address:0x78,data:0x0
address:0x7c,data:0x0
address:0x80,data:0x0
address:0x84,data:0x0
address:0x88,data:0x0
address:0x8c,data:0x0
address:0x90,data:0x0
address:0x94,data:0x0
address:0x98,data:0x6600
address:0x9c,data:0x0
address:0xa0,data:0x0
address:0xa4,data:0x0
2.my problems:
    with the seting above , the camera controller can not produce interrupt.because the isr(omap34xx_isp_isr) do not be excuted.the CCDC_VD0_IRQ interrupt is what i want.
what is wrong with my seeting.I hope some body help me out.thanks!

  • anyone can help me!

  • HI,

    Have you connected HS/VS signals to the OMAP3 from your video decoder?

    Thanks,

    Vaibhav

  • when i connect HS/VS signals to the OMAP3 from my video decoder,i can got only HS/VS interrupt.

    if not ,i can get nothing interrupt.

    In my opinion,BT656 does not need any synchronizing signal,because the data lines have embedded the timing code.

    my question:

     1.i wonder whether my setting(isp) is wrong? and where is the wrong?

  • hi Vaibhav Hiremath

    can you give me some advice?

    anyway,thank you!

  • In the case of BT-656 your V-Sync signal is the embedded SAV/EAV. The BT656 module inside the chip separates out the sync signals and propegates them to the CCDC module in the ISP. You must configure the proper registers to get sync interrupts from the CCDC module: Per TRM -

    When the data formatter is enabled, HS/VS signals are generated as output (CCDC_SYN_MODE [16] VDHDEN = 0x1). The settings for these output signals are in the following fields: CCDC_HD_VD_WID[27:16] HDW, CCDC_HD_VD_WID[11:0] VDW, CCDC_PIX_LINES[31:16] PPLN and CCDC_PIX_LINES[15:0] HLPRF

    Make sure that CCDC_SYNC_MODE [13:12} INPMOD is in the right state and that you have setup the data lane shifter to capture the data through the proper data path to get the data into the capture buffer..

     

  • In case of OMAP3, the HS_VS_IRQ is directly connected to external HS?VS wires, so you won't receive HS/VS interrupt in case of BT656 interface if you do not have these sync signals connected to OMAP CCDC.

    This finding came bit late in the development phase, so I believe the software (especially ISR routine) which you are using is still has not changed to adopt this. Can you please check whether your ISR routine is making use of HS/VS interrupt in BT656 mode? If yes, then you have to change it to use VD0/VD1 interrupts.

     

    I hope the above information would help you.

    Thanks,

    Vaibhav

  • hi

       1.my hardware connection is:

                         8 data lines(bt656) to VD0--VD7(ISP)

                         a clock line(27MHZ) to pclk(ISP)

      2.and my isp setting is:

    ----isp iomem register----
    base address:0x480B C000

    address:0x0,data:0x20
    address:0x4,data:0x2000
    address:0x8,data:0x1
    address:0xc,data:0x83311
    address:0x10,data:0x00000000
    address:0x14,data:0x0
    address:0x18,data:0x00000000
    address:0x1c,data:0x0
    address:0x20,data:0x0isr
    address:0x24,data:0x0
    address:0x28,data:0x0
    address:0x2c,data:0x0
    address:0x30,data:0x0
    address:0x34,data:0x0
    address:0x38,data:0x0
    address:0x3c,data:0x0
    address:0x40,data:0x29c100
    address:0x44,data:0x0
    address:0x48,data:0x0
    address:0x4c,data:0x0
    address:0x50,data:0x0
    address:0x54,data:0x0
    address:0x58,data:0x0
    address:0x5c,data:0x0
    address:0x60,data:0x0
    address:0x64,data:0x0
    address:0x68,data:0x10000
    address:0x6c,data:0x0


    ----isp ccdc register----
    base address:0x480B C600

    address:0x0,data:0x1fe01
    address:0x4,data:0x1
    address:0x8,data:0x32f84
    address:0xc,data:0x0
    address:0x10,data:0x0
    address:0x14,data:0x59f
    address:0x18,data:0x20002
    address:0x1c,data:0x11f
    address:0x20,data:0xffff00ff
    address:0x24,data:0x5a0
    address:0x28,data:0x249
    address:0x2c,data:0x1000
    address:0x30,data:0x10
    address:0x34,data:0x0
    address:0x38,data:0x0
    address:0x3c,data:0x4
    address:0x40,data:0x0
    address:0x44,data:0x0
    address:0x48,data:0x11f0032isr
    address:0x4c,data:0x4
    address:0x50,data:0x3
    address:0x54,data:0x8800
    address:0x58,data:0x4000
    address:0x5c,data:0x0
    address:0x60,data:0x0
    address:0x64,data:0x0
    address:0x68,data:0x2f840000
    address:0x6c,data:0x0
    address:0x70,data:0x0
    address:0x74,data:0x0
    address:0x78,data:0x0
    address:0x7c,data:0x0
    address:0x80,data:0x0
    address:0x84,data:0x0
    address:0x88,data:0x0
    address:0x8c,data:0x0
    address:0x90,data:0x0
    address:0x94,data:0x0
    address:0x98,data:0x6600
    address:0x9c,data:0x0
    address:0xa0,data:0x0
    address:0xa4,data:0x0
    3.with the setting above,i can not get any interrupt.  please help mt to check those registers,and what is wrong with the setting? thanks!

  • this problem has been resolved.and it it the hardware problem.Thanks!

  • Good to here that the problem is solved and thanks for updating the forum post.

     

    Thanks,

    Vaibhav

  • jhua h said:

    this problem has been resolved.and it it the hardware problem.Thanks!

    Hi Jhua,

    I am having similar problems to yourself as I am unable to get a sync from using BT.656. I am glad to see that you have resolved your problem, which was down to a hardware problem. I have compared my register settings to yours and all appear to be the same. Can I ask what the hardware problem was and how you fixed it? It may help us fix our issue.

    Thanks,

     

    Andy

  • Please jhua,

    Describe which problem you had with your hardware.

    It is very important for the forum and will help everybody that read this post.

    Thank you!

  • In ISP there is a corner case,  cam_d6 to cam_d9 pins are powered from vdds_csib and remaining pins are powered from vdds_io. Just check if you have enabled supply to vdds_csib pin from external supply (TPS etc). This could be one possible hardware issue.

  • Hi

    I am also having the same problem. Not getting any vd interrupt. IF you could tell me what hardware problem you had , it may help my case.

    My register settings are same as you. Please Jhua let us know how you solved the problem. 

    Can anyone help ???

    Thanks