Part Number: DRA829V
Hi Team,
I am using ti-processor-sdk-linux-j7-evm-07_03_00_05 and
I am trying to boot the J721E EVM board through OSPI boot mode. I followed the below steps for flashing the U-boot Image in OSPI Flash using tftp
=> sf probe
=> tftp ${loadaddr} tiboot3.bin
=> sf update $loadaddr 0x0 $filesize
=> tftp ${loadaddr} tispl.bin
=> sf update $loadaddr 0x80000 $filesize
=> tftp ${loadaddr} u-boot.img
=> sf update $loadaddr 0x280000 $filesize
=> tftp ${loadaddr} sysfw.itb
=> sf update $loadaddr 0x6C0000 $filesize
while using sf Probe i am getting below log
=> sf probe
Can't get reset: -2
Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:235
dma-ring-reset-quirk: disabled
WARN: PHY calibration failed: -2
SF: Detected mt35xu512aba with page size 256 Bytes, erase size 128 KiB, total 64 MiB
and I changed the boot mode to OSPI Mode i am getting below Error than uboot log is coming after some time. what is the reason for that? is i missed any setting
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
TISCI config ring fail (-19) ring_idx 6
TISCI config ring fail (-19) ring_idx 124
WARN: PHY calibration failed: -2
TISCI config ring fail (-19) ring_idx 6
Loading Environment from MMC... *** Warning - No MMC card found, using default environment
Starting ATF on ARM64 core...
NOTICE: BL31: v2.4(release):07.03.00.005-dirty
NOTICE: BL31: Built : 00:15:40, Apr 10 2021
U-Boot SPL 2020.01-g2781231a33 (Apr 10 2021 - 00:17:14 +0000)
SYSFW ABI: 3.1 (firmware rev 0x0015 '21.1.1--v2021.01a (Terrific Lla')
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
Trying to boot from SPI
Can't get reset: -2
Ring Accelerator probed rings:286, gp-rings[96,20] sci-dev-id:235
dma-ring-reset-quirk: disabled
WARN: PHY calibration failed: -2
U-Boot 2020.01-g2781231a33 (Apr 10 2021 - 00:17:14 +0000)
SoC: J721E SR1.0
Model: Texas Instruments K3 J721E SoC
Board: J721EX-PM2-SOM rev E7
DRAM: 4 GiB
not found for dev hbmc-mux
Flash: 0 Bytes
MMC: sdhci@4f80000: 0, sdhci@4fb0000: 1
Loading Environment from MMC... OK
In: serial@2800000
Out: serial@2800000
Err: serial@2800000
Detected: J7X-BASE-CPB rev E3
Detected: J7X-VSC8514-ETH rev E2
Net: K3 CPSW: nuss_ver: 0x6BA00101 cpsw_ver: 0x6BA80100 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
eth0: ethernet@46000000
Hit any key to stop autoboot: 0
