AM6442: MCU_OSC Review for AM6442

We are not aware on any issue with using a crystal circuit to implement a reference clock source for AM64x.  However, you are expected to select crystal circuit components that meet requirements defined in the datasheet section titled "MCU_OSC0 Internal Oscillator Clock Source".

I will need to ask our DDR expert about your other question.

Regards,
Paul

I spoke with our DDR expert and he said:

Since you are connecting it to a GPIO that defaults to an off state, you should connect an external pull resistor that disables the VTT regulator at power up. This way VTT remains off until you are ready to initialize DDR. Once you are ready to initialize DDR, the GPIO associated with this pin should be configured to operate as an output with a logic state that enables the VTT supply. Next you need to configure the PADCONFIG register associated with this pin in two steps. You will configure all bits in the PADCONFIG register except TXENABLE during the first step. The first step should include selecting the GPIO mux mode. In the next step you enable the output buffer with the TXENABLE bit.

Note: The output buffer of each multiplexed IO should be turned off with TXENABLE before changing the mux mode value in PADCONFIG. This prevents the IO from driving unknow logic states while the pin mux logic changes the source of the output buffer. After changing the mux mode value, another operation is performed to turn the output buffer back on with TXENABLE.

Regards,
Paul