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McBSP (SPI mode) set up!

My customer is using a 5510 DSP. Here's the problem statement:

I am trying to talk to an SDHC card using one of the McBsp ports configured in SPI (clock stop) mode. I need to send multiple command bytes to the device without having the FSX pin (that I am using as a chip select/slave select line) toggle between bytes. So I attempted to change the XFRLEN1 setting to 5 to send 6 bytes of data in a single frame. It did solve the FSX toggling problem, but there were extra clocks added to the frame of data sent. The first byte of the frame had 8 clocks, as it was supposed to, but the subsequent bytes had 9 clocks each. I am using the McBsp_Write16 function with a check of the ready bit between each of the writes to the buffered serial port, so I do not know if this is a problem, if it is something in my configuration, or if the DSP just doesn’t support frame sizes other than 1 while in clock stop mode. I couldn't find anything in the spru592e document that said it supported different frame lengths in clock stop (SPI) mode, but I am hoping it does, and that I just have something set up incorrectly in my McBsp configuration. I hope you can straighten me out on this.

  • Hi,

    First, can you send me your configurations for us to look at it?

    Regards,

    Hyun

  • Here's the config file:

     

    //----------------------------------------------------------------------------------------------------------------------------------------------

     

    #include <csl_irq.h>

    #include <csl_gpio.h>

    #include <csl_mcbsp.h>

    #include <string.h>

     

     

    //-----------------------------------------------------------------------------

    //                         MCBSP Configuration

    //-----------------------------------------------------------------------------

    static MCBSP_Config mcbsp_Cfg = {

        MCBSP_SPCR1_RMK(

            MCBSP_SPCR1_DLB_OFF,

            MCBSP_SPCR1_RJUST_RZF,

            MCBSP_SPCR1_CLKSTP_NODELAY,

            MCBSP_SPCR1_DXENA_OFF,

            MCBSP_SPCR1_ABIS_DISABLE,

            MCBSP_SPCR1_RINTM_RRDY,

            MCBSP_SPCR1_RSYNCERR_NO,

            MCBSP_SPCR1_RRST_ENABLE ),

        

        MCBSP_SPCR2_RMK(

            MCBSP_SPCR2_FREE_NO,

            MCBSP_SPCR2_SOFT_NO,

            MCBSP_SPCR2_FRST_FSG,

            MCBSP_SPCR2_GRST_CLKG,

            MCBSP_SPCR2_XINTM_XRDY,

            MCBSP_SPCR2_XSYNCERR_NO,

            MCBSP_SPCR2_XRST_ENABLE ),

     

        MCBSP_RCR1_RMK(

            MCBSP_RCR1_RFRLEN1_OF(0),

            MCBSP_RCR1_RWDLEN1_8BIT ),

     

        MCBSP_RCR2_RMK(

            MCBSP_RCR2_RPHASE_SINGLE,

            MCBSP_RCR2_RFRLEN2_OF(0),

            MCBSP_RCR2_RWDLEN2_8BIT,

            MCBSP_RCR2_RCOMPAND_MSB,

            MCBSP_RCR2_RFIG_YES,

            MCBSP_RCR2_RDATDLY_1BIT ),

     

        MCBSP_XCR1_RMK(

            MCBSP_XCR1_XFRLEN1_OF(5),

            MCBSP_XCR1_XWDLEN1_8BIT ),

     

        MCBSP_XCR2_RMK(

            MCBSP_XCR2_XPHASE_SINGLE,

            MCBSP_XCR2_XFRLEN2_OF(0),

            MCBSP_XCR2_XWDLEN2_8BIT,

            MCBSP_XCR2_XCOMPAND_MSB,

            MCBSP_XCR2_XFIG_YES,

            MCBSP_XCR2_XDATDLY_0BIT ),

     

        MCBSP_SRGR1_RMK(

            MCBSP_SRGR1_FWID_OF( 0 ),

            MCBSP_SRGR1_CLKGDV_OF( 60 ) ),

     

        MCBSP_SRGR2_RMK(

            MCBSP_SRGR2_GSYNC_FREE,

            MCBSP_SRGR2_CLKSP_RISING,

            MCBSP_SRGR2_CLKSM_INTERNAL,

            MCBSP_SRGR2_FSGM_DXR2XSR,

            MCBSP_SRGR2_FPER_OF(0) ),

     

        MCBSP_MCR1_DEFAULT,

        MCBSP_MCR2_DEFAULT,

     

        MCBSP_PCR_RMK(

            MCBSP_PCR_IDLEEN_RESET,

            MCBSP_PCR_XIOEN_SP,

            MCBSP_PCR_RIOEN_SP,

            MCBSP_PCR_FSXM_INTERNAL,

            MCBSP_PCR_FSRM_EXTERNAL,

            MCBSP_PCR_CLKXM_OUTPUT,

            MCBSP_PCR_CLKRM_INPUT,

            MCBSP_PCR_SCLKME_NO,

            MCBSP_PCR_DXSTAT_0,

            MCBSP_PCR_FSXP_ACTIVELOW,

            MCBSP_PCR_FSRP_ACTIVEHIGH,

            MCBSP_PCR_CLKXP_FALLING,

            MCBSP_PCR_CLKRP_FALLING ),

     

        MCBSP_RCERA_DEFAULT,

        MCBSP_RCERB_DEFAULT,

        MCBSP_RCERC_DEFAULT,

        MCBSP_RCERD_DEFAULT,

        MCBSP_RCERE_DEFAULT,

        MCBSP_RCERF_DEFAULT,

        MCBSP_RCERG_DEFAULT,

        MCBSP_RCERH_DEFAULT,

        MCBSP_XCERA_DEFAULT,

        MCBSP_XCERB_DEFAULT,

        MCBSP_XCERC_DEFAULT,

        MCBSP_XCERD_DEFAULT,

        MCBSP_XCERE_DEFAULT,

        MCBSP_XCERF_DEFAULT,

        MCBSP_XCERG_DEFAULT,

        MCBSP_XCERH_DEFAULT

    };

     

    //----------------------------------------------------------------------------------------------------------------------------------------------

     

     

  • Dear Saeb Abdallah, did the issue resolve ?

    I am also trying to use SPI and I am stuck too.