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Linux/AM3352: Wakeup events

Part Number: AM3352

Tool/software: Linux

Dear Team,

Could you please let me know the details about Wakeup Events and how wakeup will be started?

e.g. is it possible to Wakeup processor only when received IR Key Code(0x02) through UART0? 

and, is it possible to get some data through I2C and analyze it on standby mode, and wakeup processor only when the results will be over threshold?

Thanks and Best Regards,

SI.

  • Hi Sung,

    You can get info regarding AM335x Wakup from the below docs/links:

    - AM335x TRM, sections 8.1.4.3 Power Modes, 8.1.4.4 Main Oscillator Control During Deep Sleep, 8.1.4.5 Wakeup Sources/Events, 8.1.4.6 Functional Sequencing for Power Management with Cortex M3

    - AM335x DM, Table 5-11. AM335x Low-Power Modes Power Consumption Summary

    - processors.wiki.ti.com/.../Linux_Core_Power_Management_User's_Guide_(v4.4)

    - processors.wiki.ti.com/.../Sitara_Linux_Training:_Power_Management

    - processors.wiki.ti.com/.../Debugging_AM335x_Suspend-Resume_Issues

    - www.ti.com/.../sprac74a.pdf


    Regards,
    Pavel
  • Hi Pavel,


    Actually what I want to check is if there is a way to analyze I2C or UART data on standby mode. for example, is it possible to use M3 core(CM3) to analyze I2C or UART data and wake-up main Cortex-A8 core at specific condition?
    I'm checking on the documents if CM3(M3 core) can be used to analyze data from I2C or UART at standby mode, but could not find any clear picture yet.



    Thanks and Best Regards,
    SI.
  • Sung,

    Sung-IL said:
    Could you please let me know the details about Wakeup Events and how wakeup will be started?

    Check AM335x TRM, section 8.1.4.6.3 Wakeup Sequencing

    See also below PDF file:

    8875.sitara_boot_camp_am335x_pm_sw_training.pdf

    Sung-IL said:
    e.g. is it possible to Wakeup processor only when received IR Key Code(0x02) through UART0? 

    If receiving IR Code can generate wakeup interrupt towards Cortex-M3, then it is possible. But seems that this is not implemented in AM335x linux kernel and firmware, looks like only console interrupt is supported by SW.

    Sung-IL said:
    and, is it possible to get some data through I2C and analyze it on standby mode, and wakeup processor only when the results will be over threshold?

    AM335x has several peripherals in the Wakeup Power Domain. Since these peripherals remain powered on during deep sleep and suspend, they can be used to generate wakeup interrupts when the processor is in a suspend or sleep mode. In addition, these peripherals can be used to control on board peripherals during the suspend/resume sequence.

    As Cortex-M3 is power management coprocessor, it can be used only for power related tasks. I do not think Cortex-M3 can be used to analyze I2C data in standby mode. Cortex-M3 can only adjust PMIC voltages through I2C0 during DS0 mode. The Cortex M3 uses I2C0 for communication with the Power Management IC (PMIC) for purposes of reducing the voltage during DS0.

    Regards,
    Pavel

  • Sung-IL said:
    Actually what I want to check is if there is a way to analyze I2C or UART data on standby mode. for example, is it possible to use M3 core(CM3) to analyze I2C or UART data and wake-up main Cortex-A8 core at specific condition?

    Per mine understanding, and from what I was able to find, my answer is NO.

    Regards,
    Pavel

  • Pavel,

    Thanks for this information and explanation.

    * Is the M3 still alive and need to control PMIC during DS0?

    * in standby mode and DS1, is the M3 still used to control PMIC?

    * Could you please more details on below your comment? What is the exact meaning of 'control on board peripherals during the suspend/resume sequence'?

    What is the 'control' in this case?

    In addition, these peripherals can be used to control on board peripherals during the suspend/resume sequence.

    Thanks and Best Regards,

    SI.

    Thanks and Best Regards,

    SI.

  • Sung,

    Sung-IL said:

    * Is the M3 still alive and need to control PMIC during DS0?

    * in standby mode and DS1, is the M3 still used to control PMIC?

    * Could you please more details on below your comment? What is the exact meaning of 'control on board peripherals during the suspend/resume sequence'?

    What is the 'control' in this case?

    In addition, these peripherals can be used to control on board peripherals during the suspend/resume sequence.

    It is possible to scale the voltages on both the MPU and CORE supply rails down to 0.95V while we are in DeepSleep once powerdomains are shut off. The i2c sequences needed to scale voltage vary from board to board and are dependent on which PMIC is in use, so we use board specific binaries that are passed to the CM3 firmware to define the sequences needed during the sleep and wake paths. The CM3 firmware is then able to write these sequences out at the proper location in the Deep Sleep path on i2c0.

    http://processors.wiki.ti.com/index.php/Linux_Core_Power_Management_User's_Guide_(v4.4)#Deep_Sleep_Voltage_Scaling

    Regards,
    Pavel