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[FAQ] AM6422: SK and EVM EXT_REFCLK1 CLKOUT0 use case and configuration

Part Number: AM6422
Other Parts Discussed in Thread: SK-AM64B, , CDCLVC1310

Tool/software:

Hi,

In AM6422 evaluation board SK-AM64B. It connect the EXT_REFCLK1 to CLKOUT0 signal. i have some question about it.

1. EXT_REFCLK1 is 3.3V. Why it connect to a 1.8V clock buffer. Will it damage the buffer?

2. If EXT_REFCLK1 output the signal to 1.8V buffer. How the clock generate from EXT_REFCLK1. looks like the buffer also support the main domain clock input. if the main domain doesn't has the input clock firstly, how the EXT_REFCLK1 generate clock signal. if I am wrong, how the circuit work?

 the PROC101D evaluation board has similar questions. looks like logic level is not same. And if the buffer CDCLVC1310 input is select to primary. how the main/mcu domain clock work firstly.

Best Regards,
Shu  

  • Hello Shu  

    Thank you for the query.

    Please refer below.

    1. EXT_REFCLK1 is 3.3V. Why it connect to a 1.8V clock buffer. Will it damage the buffer?

    Supply voltage: 3.3 V, 2.5 V, or 1.8 V – 3.3-V tolerant input at all supply voltages – Fail-safe inputs

    In AM6422 evaluation board SK-AM64B. It connect the EXT_REFCLK1 to CLKOUT0 signal. i have some question about it.

    1. EXT_REFCLK1 is 3.3V. Why it connect to a 1.8V clock buffer. Will it damage the buffer?

    2. If EXT_REFCLK1 output the signal to 1.8V buffer. How the clock generate from EXT_REFCLK1. looks like the buffer also support the main domain clock input. if the main domain doesn't has the input clock firstly, how the EXT_REFCLK1 generate clock signal. if I am wrong, how the circuit work?

    This is used when the SOC had the crystal clock option configured.

    I am not sure if this has been tested.

    I need to check and comeback.

    Regards,

    Sreenivasa

  • Hello Shu  

    Please refer below. The same pin can be configured as Clkout0. The EVM configuration is a valid configuration that can be used when the SOC is configured for Crystal.

    6.3.22.3 System
    6.3.22.3.1 MAIN Domain

    CLKOUT0
    O
    RMII Clock Output (50 MHz). This pin is used for clock
    source to the external PHY and must be routed back to
    the RMII_REF_CLK pin for proper device operation. A19, U13

    EXT_REFCLK1
    I
    External clock input to Main Domain, routed to Timer
    clock muxes as one of the selectable input clock
    sources for Timer/WDT modules, or as reference clock
    to MAIN_PLL2 (PER1 PLL) A19

    Regards,

    Sreenivasa

  • Hi Sreenivasa,

    That is my concern. looks like the EVM make the EXT_REFCLK1 to a clkout0 function, it is a output clock to a clock input buffer. the buffer is connected to SoC main clock input. So where is the first clock come from? if the SoC clock from a crystal, where the EXT_REFCLK1 clock go. In EVM, it go to same buffer input as the crystal. I don't think the buffer can use two inputs at same time.

    Best Regards,

    Shu

  • Hello Shu, 

    The SOC CLKOUT0 can be used only to clock the EPHY and can only be used when a crystal is connected to the SOC oscillator.

    Regards,

    Sreenivasa

  • okay, that make sense. 

    thank you very much

  • Hello Shu, 

    Thank you for the note. The explanation is valid for AM64x as well as AM62x, AM62Ax and AM62Px SKs.

    Regards,

    Sreenivasa

  • Ai All, 

    Additional inputs on usage of clock and buffers.

    When an external clock (LVCMOS) oscillator is used as the clock source for the processor and the EPHY, a single oscillator could be used for the processor and the EPHY or separate oscillator can be used. When using a single oscillator, the clock output is recommended to be buffered before connecting to processor and EPHYs.
    Single output, individual buffer ICs for processor and EPHY(s) or Dual or Multiple output buffer IC for processor and EPHY(s) can be used to connect the clock output from the oscillator to the processor and the EPHY(s)
    For specific use case (requirement for some of the industrial applications using Time Sensitive Networking (TSN)), two or more output (based on number of EPHYs used) buffer with a single input is recommended for the processor and the EPHY(s).

    Regards,

    Sreenivasa