Hi,
a customer is currently running into a PCIe enumeration problem with a C6678 in PCIe EP mode and a "built-in" Intel SBC (here in a COMe daughtercard) where the Intel PC is acting as PCIe RC. The C6678 is the latest silicon rev.
The specific timing of the reset de-assertion of DSP vs COMe is outlined in the attached pdf.
Could you tell us whether this timing looks good or whether there is something fundamentally wrong?
We are currently looking at the following thread, which suggests to use an IBL to re-enable the LTSSM. Our goal would be to use just the ROM bootloader without IBL. Is the IBL still needed with the latest silicon rev?
We are also looking at the FAQ at
Here it states to wire PERST to the reset on an input of the push button (in the EVM case). Could you tell us what resets should be connected, assuming custom HW?
The customer is still testing and we can provide more detail.
Thanks,
--Gunter
