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Linux/AM5708: Generation of array pad configurations from pin mux file

Part Number: AM5708

Tool/software: Linux

Hello Paval and all Merry christmas and Happy New Year.

with reference to https://e2e.ti.com/support/processors/f/791/p/757089/2796841#2796841. i generated array pad configurations for customized AM5708 board using pin mux utility tool and perl script

pad confiuration content:

-------------------------------------

{GPMC_AD0, (M0 | PIN_INPUT)}, /* gpmc_ad0.gpmc_ad0 */
{GPMC_AD1, (M0 | PIN_INPUT)}, /* gpmc_ad1.gpmc_ad1 */
{GPMC_AD2, (M0 | PIN_INPUT)}, /* gpmc_ad2.gpmc_ad2 */
{GPMC_AD3, (M0 | PIN_INPUT)}, /* gpmc_ad3.gpmc_ad3 */
{GPMC_AD4, (M0 | PIN_INPUT)}, /* gpmc_ad4.gpmc_ad4 */
{GPMC_AD5, (M0 | PIN_INPUT)}, /* gpmc_ad5.gpmc_ad5 */
{GPMC_AD6, (M0 | PIN_INPUT)}, /* gpmc_ad6.gpmc_ad6 */
{GPMC_AD7, (M0 | PIN_INPUT)}, /* gpmc_ad7.gpmc_ad7 */
{GPMC_AD8, (M0 | PIN_INPUT)}, /* gpmc_ad8.gpmc_ad8 */
{GPMC_AD9, (M0 | PIN_INPUT)}, /* gpmc_ad9.gpmc_ad9 */
{GPMC_AD10, (M0 | PIN_INPUT)}, /* gpmc_ad10.gpmc_ad10 */
{GPMC_AD11, (M0 | PIN_INPUT)}, /* gpmc_ad11.gpmc_ad11 */
{GPMC_AD12, (M0 | PIN_INPUT)}, /* gpmc_ad12.gpmc_ad12 */
{GPMC_AD13, (M0 | PIN_INPUT)}, /* gpmc_ad13.gpmc_ad13 */
{GPMC_AD14, (M0 | PIN_INPUT)}, /* gpmc_ad14.gpmc_ad14 */
{GPMC_AD15, (M0 | PIN_INPUT)}, /* gpmc_ad15.gpmc_ad15 */
{GPMC_A0, (M14 | PIN_OUTPUT)}, /* gpmc_a0.gpmc_a16 */
{GPMC_A1, (M0 | PIN_OUTPUT)}, /* gpmc_a1.gpmc_a1 */
{GPMC_A2, (M0 | PIN_OUTPUT)}, /* gpmc_a2.gpmc_a2 */
{GPMC_A3, (M0 | PIN_OUTPUT)}, /* gpmc_a3.gpmc_a3 */
{GPMC_A4, (M0 | PIN_OUTPUT)}, /* gpmc_a4.gpmc_a4 */
{GPMC_A5, (M0 | PIN_OUTPUT)}, /* gpmc_a5.gpmc_a5 */
{GPMC_A6, (M0 | PIN_OUTPUT)}, /* gpmc_a6.gpmc_a6 */
{GPMC_A7, (M0 | PIN_OUTPUT)}, /* gpmc_a7.gpmc_a7 */
{GPMC_A8, (M0 | PIN_OUTPUT)}, /* gpmc_a8.gpmc_a8 */
{GPMC_A9, (M0 | PIN_OUTPUT)}, /* gpmc_a9.gpmc_a9 */
{GPMC_A10, (M0 | PIN_OUTPUT)}, /* gpmc_a10.gpmc_a10 */
{GPMC_A11, (M0 | PIN_OUTPUT)}, /* gpmc_a11.gpmc_a11 */
{GPMC_A12, (M0 | PIN_OUTPUT)}, /* gpmc_a12.gpmc_a12 */
{GPMC_A13, (M0 | PIN_OUTPUT)}, /* gpmc_a13.gpmc_a13 */
{GPMC_A14, (M0 | PIN_OUTPUT)}, /* gpmc_a14.gpmc_a14 */
{GPMC_A15, (M0 | PIN_OUTPUT)}, /* gpmc_a15.gpmc_a15 */
{GPMC_A17, (M0 | PIN_OUTPUT)}, /* gpmc_a17.gpmc_a17 */
{GPMC_A18, (M0 | PIN_OUTPUT)}, /* gpmc_a18.gpmc_a18 */
{GPMC_A19, (M0 | PIN_OUTPUT)}, /* gpmc_a19.gpmc_a19 */
{GPMC_A20, (M0 | PIN_OUTPUT)}, /* gpmc_a20.gpmc_a20 */
{GPMC_A21, (M0 | PIN_OUTPUT)}, /* gpmc_a21.gpmc_a21 */
{GPMC_A22, (M0 | PIN_OUTPUT)}, /* gpmc_a22.gpmc_a22 */
{GPMC_A23, (M0 | PIN_OUTPUT)}, /* gpmc_a23.gpmc_a23 */
{GPMC_A24, (M0 | PIN_OUTPUT)}, /* gpmc_a24.gpmc_a24 */
{GPMC_A25, (M0 | PIN_OUTPUT)}, /* gpmc_a25.gpmc_a25 */
{GPMC_A26, (M0 | PIN_OUTPUT)}, /* gpmc_a26.gpmc_a26 */
{GPMC_A27, (M0 | PIN_OUTPUT)}, /* gpmc_a27.gpmc_a27 */
{GPMC_CS1, (M0 | PIN_OUTPUT)}, /* gpmc_cs1.gpmc_cs1 */
{GPMC_CS0, (M0 | PIN_OUTPUT)}, /* gpmc_cs0.gpmc_cs0 */
{GPMC_CS2, (M0 | PIN_OUTPUT)}, /* gpmc_cs2.gpmc_cs2 */
{GPMC_CS3, (M0 | PIN_OUTPUT)}, /* gpmc_cs3.gpmc_cs3 */
{GPMC_CLK, (M8 | PIN_INPUT)}, /* gpmc_clk.i2c3_scl */
{GPMC_ADVN_ALE, (M8 | PIN_INPUT)}, /* gpmc_advn_ale.i2c3_sda */
{GPMC_OEN_REN, (M0 | PIN_OUTPUT)}, /* gpmc_oen_ren.gpmc_oen_ren */
{GPMC_WEN, (M0 | PIN_OUTPUT)}, /* gpmc_wen.gpmc_wen */
{GPMC_BEN0, (M0 | PIN_OUTPUT)}, /* gpmc_ben0.gpmc_ben0 */
{GPMC_BEN1, (M0 | PIN_OUTPUT)}, /* gpmc_ben1.gpmc_ben1 */
{GPMC_WAIT0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpmc_wait0 */
{VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_vsync0.gpio4_0 */
{VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */
{VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */
{VIN2A_D4, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d4.gpio4_5 */
{VIN2A_D5, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d5.gpio4_6 */
{VIN2A_D6, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d6.gpio4_7 */
{VIN2A_D7, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d7.gpio4_8 */
{VIN2A_D8, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d8.gpio4_9 */
{VIN2A_D9, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d9.gpio4_10 */
{VIN2A_D10, (M3 | PIN_OUTPUT)}, /* vin2a_d10.mdio_mclk */
{VIN2A_D11, (M3 | PIN_INPUT)}, /* vin2a_d11.mdio_d */
{VIN2A_D12, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d12.gpio4_13 */
{VIN2A_D13, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d13.gpio4_14 */
{VIN2A_D14, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d14.gpio4_15 */
{VIN2A_D15, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d15.gpio4_16 */
{VIN2A_D16, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d16.gpio4_24 */
{VIN2A_D17, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d17.gpio4_25 */
{VIN2A_D18, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d18.gpio4_26 */
{VIN2A_D19, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d19.gpio4_27 */
{VIN2A_D20, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d20.gpio4_28 */
{VIN2A_D21, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d21.gpio4_29 */
{VIN2A_D22, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d22.gpio4_30 */
{VIN2A_D23, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d23.gpio4_31 */
{MDIO_MCLK, (M3 | PIN_INPUT | SLEWCONTROL)}, /* mdio_mclk.mii0_col */
{MDIO_D, (M3 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_d.mii0_txer */
{RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */
{UART3_RXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_rxd.mii0_rxdv */
{UART3_TXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_txd.mii0_rxclk */
{RGMII0_TXC, (M3 | PIN_INPUT)}, /* rgmii0_txc.mii0_rxd3 */
{RGMII0_TXCTL, (M3 | PIN_INPUT)}, /* rgmii0_txctl.mii0_rxd2 */
{RGMII0_TXD3, (M3 | PIN_INPUT)}, /* rgmii0_txd3.mii0_crs */
{RGMII0_TXD2, (M3 | PIN_INPUT)}, /* rgmii0_txd2.mii0_rxer */
{RGMII0_TXD1, (M3 | PIN_INPUT)}, /* rgmii0_txd1.mii0_rxd1 */
{RGMII0_TXD0, (M3 | PIN_INPUT)}, /* rgmii0_txd0.mii0_rxd0 */
{RGMII0_RXC, (M3 | PIN_INPUT)}, /* rgmii0_rxc.mii0_txclk */
{RGMII0_RXCTL, (M3 | PIN_OUTPUT)}, /* rgmii0_rxctl.mii0_txd3 */
{RGMII0_RXD3, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd3.mii0_txd2 */
{RGMII0_RXD2, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd2.mii0_txen */
{RGMII0_RXD1, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd1.mii0_txd1 */
{RGMII0_RXD0, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd0.mii0_txd0 */
{GPIO6_14, (M3 | PIN_INPUT)}, /* gpio6_14.uart10_rxd */
{GPIO6_15, (M3 | PIN_OUTPUT)}, /* gpio6_15.uart10_txd */
{XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */
{XREF_CLK1, (M11 | PIN_INPUT)}, /* xref_clk1.pr2_mii1_crs */
{MCASP1_ACLKX, (M11 | PIN_OUTPUT)}, /* mcasp1_aclkx.pr2_mdio_mdclk */
{MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */
{MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */
{MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */
{MCASP1_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */
{MCASP1_AXR1, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */
{MCASP1_AXR2, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr2.gpio5_4 */
{MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */
{MCASP1_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr4.gpio5_6 */
{MCASP1_AXR5, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr5.gpio5_7 */
{MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */
{MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */
{MCASP1_AXR8, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */
{MCASP1_AXR9, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */
{MCASP1_AXR10, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */
{MCASP1_AXR11, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */
{MCASP1_AXR12, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */
{MCASP1_AXR13, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */
{MCASP1_AXR14, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */
{MCASP1_AXR15, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr15.pr2_mii0_rxd3 */
{MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */
{MCASP2_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_fsx.pr2_mii0_rxd1 */
{MCASP2_AXR2, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_axr2.pr2_mii0_rxd0 */
{MCASP2_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr4.gpio1_4 */
{MCASP2_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr7.gpio1_5 */
{MCASP3_ACLKX, (M11 | PIN_INPUT)}, /* mcasp3_aclkx.pr2_mii0_crs */
{MCASP3_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_fsx.pr2_mii0_col */
{MCASP3_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */
{MCASP5_AXR0, (M4 | PIN_INPUT)}, /* mcasp5_axr0.uart3_rxd */
{MCASP5_AXR1, (M4 | PIN_OUTPUT)}, /* mcasp5_axr1.uart3_txd */
{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */
{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */
{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */
{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */
{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */
{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */
{MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */
{MMC1_SDWP, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.mmc1_sdwp */
{GPIO6_10, (M11 | PIN_INPUT)}, /* gpio6_10.pr2_mii_mt1_clk */
{GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */
{MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */
{MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */
{MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */
{MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */
{MMC3_DAT2, (M11 | PIN_INPUT)}, /* mmc3_dat2.pr2_mii_mr1_clk */
{MMC3_DAT3, (M11 | PIN_INPUT)}, /* mmc3_dat3.pr2_mii1_rxdv */
{MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */
{MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */
{MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */
{MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */
{SPI1_SCLK, (M0 | PIN_OUTPUT)}, /* spi1_sclk.spi1_sclk */
{SPI1_D1, (M0 | PIN_OUTPUT)}, /* spi1_d1.spi1_d1 */
{SPI1_D0, (M0 | PIN_INPUT)}, /* spi1_d0.spi1_d0 */
{SPI1_CS0, (M0 | PIN_OUTPUT)}, /* spi1_cs0.spi1_cs0 */
{SPI1_CS2, (M4 | PIN_OUTPUT | SLEWCONTROL)}, /* spi1_cs2.dcan2_tx */
{SPI1_CS3, (M15 | PIN_INPUT)}, /* spi1_cs3.dcan2_rx */
{DCAN1_TX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.gpio1_14 */
{DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */
{UART1_RXD, (M0 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
{UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
{UART1_CTSN, (M0 | PIN_INPUT)}, /* uart1_ctsn.uart1_ctsn */
{UART1_RTSN, (M0 | PIN_OUTPUT)}, /* uart1_rtsn.uart1_rtsn */
{UART2_RXD, (M5 | PIN_INPUT)}, /* uart2_rxd.uart1_dcdn */
{UART2_CTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.gpio1_16 */
{UART2_RTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.gpio1_17 */
{I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */
{I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */
{I2C2_SDA, (M0 | PIN_INPUT)}, /* i2c2_sda.i2c2_sda */
{I2C2_SCL, (M0 | PIN_INPUT)}, /* i2c2_scl.i2c2_scl */
{WAKEUP0, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup0.gpio1_0 */
{WAKEUP3, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup3.gpio1_3 */

------------------------------------------------------------------------------------------------------------

For those configurations do i need to touch device tree files? if so can you please point out me some examples and reference documents.

Thanks,

Gourav

 

  • Hello Gourav,

    Due to the US holidays, on this particular E2E thread, our response may get delayed until the week of Jan 2, 2019.

    Warmest Wishes for Happy Holidays and a Happy New Year!

    best regards,
    David Zhou
  • gourav roy said:
    For those configurations do i need to touch device tree files? if so can you please point out me some examples and reference documents.

    Gourav,

    Please see the following app note:

    AM57xx Sitara™ IO Configuration Requirements
    http://www.ti.com/lit/sprac44

    The perl script output should be incorporated into your board-specific mux_data.h file.  See u-boot/board/ti/am57xx/mux_data.h for an example from the AM57xx EVM and IDK.

    Due to AM57xx Manual I/O configuration constraints, we recommend that all pin muxing is handled in the bootloader.  In other words, you should avoid configuring pin muxing in the device tree and instead perform all your pin muxing in u-boot.

    Best regards,
    Brad

  • Thank you Brad for your response.

    Actually my doubt is, do we need to modify related device tree files in u-boot along with mux_data.h to make pin mux configurations of customized board applicable.

    For example in existing device tree file at u-boot, am57xx-idk-common.dtsi, i2c1 entries are:

    &i2c1 {
    status = "okay";
    clock-frequency = <400000>;

    tps659038: tps659038@58 {
    compatible = "ti,tps659038";
    reg = <0x58>;
    interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
    &dra7_pmx_core 0x418>;
    #interrupt-cells = <2>;
    interrupt-controller;
    ti,system-power-controller;
    ti,palmas-override-powerhold;

    ...............................................

    ..........................................



    But pin mux configurations for custom board have i2c1 and i2c2 also. Do we need to create entry for i2c2 in similar way in device tree file at u-boot level?



    Thanks,

    Gourav
  • I don't recall touching any pin muxing in the u-boot device tree in recent board bring-ups I've done. For now the key place is mux_data.h. I'm going to ask one of my colleagues if he has any additional inputs, though he's out this week on vacation.
  • Thanks Brad,

    i think we need to register entries in device tree also..i am working on it. Please provide the inputs on the same once get information from your colleagues.

    Regards,
    Gourav
  • Gourav,

    Per the app note and Brad's suggestions, you shouldn't need to put pin muxing in the Device Tree as it should all be contained in mux_data.h. I believe muxing on the AM57x is done even before DT is read.

    I hope this helps. Thanks.
  • Thanks RonB for your response.

    Sorry for my ignorance on pinmux configurations and device tree concepts.

    I am thinking that we need to register/edit entries in u-boot device tree file along with mux_data.h corresponding to board customization. If we want to change default debug port from UART3 to UART1, we need to change respective UART entries in device tree file and mux_data.h right?

    For reference i have pasted complete pad configuration file content in the previous post.

    Regards,
    Gourav
  • Gourav,

    Yes, you would need to make device tree changes in that case. We're just pointing out that pin muxing is handled through mux_data.h rather than the device tree. FYI, clocking is also done separately.  For reference please see:

    arch/arm/mach-omap2/clocks-common.c,  setup_early_clocks(void)

    In the case of the console, however, ALL of the UARTs are enabled, so you wouldn't need to make any clock changes if you were changing the UART.

    Are you actually planning to change the UART?  I don't recommend doing that.  It's a pain to make and maintain the changes, and also you can only boot from UART3 (if you have used the correct set of pins).

    Brad

  • Brad,

    I am not planning to change UART. Just treated it as example.

    My problem in simple way, We have customized AM5708 and corresponding pinmux configuration file. Now my question is:

    Is it not necessary to change device tree file came with TI's SDK according to hardware changes to make customized board work? if not so please share point me to suitable information.

    Below is the content of pad configuration file:

    {GPMC_AD0, (M0 | PIN_INPUT)}, /* gpmc_ad0.gpmc_ad0 */
    {GPMC_AD1, (M0 | PIN_INPUT)}, /* gpmc_ad1.gpmc_ad1 */
    {GPMC_AD2, (M0 | PIN_INPUT)}, /* gpmc_ad2.gpmc_ad2 */
    {GPMC_AD3, (M0 | PIN_INPUT)}, /* gpmc_ad3.gpmc_ad3 */
    {GPMC_AD4, (M0 | PIN_INPUT)}, /* gpmc_ad4.gpmc_ad4 */
    {GPMC_AD5, (M0 | PIN_INPUT)}, /* gpmc_ad5.gpmc_ad5 */
    {GPMC_AD6, (M0 | PIN_INPUT)}, /* gpmc_ad6.gpmc_ad6 */
    {GPMC_AD7, (M0 | PIN_INPUT)}, /* gpmc_ad7.gpmc_ad7 */
    {GPMC_AD8, (M0 | PIN_INPUT)}, /* gpmc_ad8.gpmc_ad8 */
    {GPMC_AD9, (M0 | PIN_INPUT)}, /* gpmc_ad9.gpmc_ad9 */
    {GPMC_AD10, (M0 | PIN_INPUT)}, /* gpmc_ad10.gpmc_ad10 */
    {GPMC_AD11, (M0 | PIN_INPUT)}, /* gpmc_ad11.gpmc_ad11 */
    {GPMC_AD12, (M0 | PIN_INPUT)}, /* gpmc_ad12.gpmc_ad12 */
    {GPMC_AD13, (M0 | PIN_INPUT)}, /* gpmc_ad13.gpmc_ad13 */
    {GPMC_AD14, (M0 | PIN_INPUT)}, /* gpmc_ad14.gpmc_ad14 */
    {GPMC_AD15, (M0 | PIN_INPUT)}, /* gpmc_ad15.gpmc_ad15 */
    {GPMC_A0, (M14 | PIN_OUTPUT)}, /* gpmc_a0.gpmc_a16 */
    {GPMC_A1, (M0 | PIN_OUTPUT)}, /* gpmc_a1.gpmc_a1 */
    {GPMC_A2, (M0 | PIN_OUTPUT)}, /* gpmc_a2.gpmc_a2 */
    {GPMC_A3, (M0 | PIN_OUTPUT)}, /* gpmc_a3.gpmc_a3 */
    {GPMC_A4, (M0 | PIN_OUTPUT)}, /* gpmc_a4.gpmc_a4 */
    {GPMC_A5, (M0 | PIN_OUTPUT)}, /* gpmc_a5.gpmc_a5 */
    {GPMC_A6, (M0 | PIN_OUTPUT)}, /* gpmc_a6.gpmc_a6 */
    {GPMC_A7, (M0 | PIN_OUTPUT)}, /* gpmc_a7.gpmc_a7 */
    {GPMC_A8, (M0 | PIN_OUTPUT)}, /* gpmc_a8.gpmc_a8 */
    {GPMC_A9, (M0 | PIN_OUTPUT)}, /* gpmc_a9.gpmc_a9 */
    {GPMC_A10, (M0 | PIN_OUTPUT)}, /* gpmc_a10.gpmc_a10 */
    {GPMC_A11, (M0 | PIN_OUTPUT)}, /* gpmc_a11.gpmc_a11 */
    {GPMC_A12, (M0 | PIN_OUTPUT)}, /* gpmc_a12.gpmc_a12 */
    {GPMC_A13, (M0 | PIN_OUTPUT)}, /* gpmc_a13.gpmc_a13 */
    {GPMC_A14, (M0 | PIN_OUTPUT)}, /* gpmc_a14.gpmc_a14 */
    {GPMC_A15, (M0 | PIN_OUTPUT)}, /* gpmc_a15.gpmc_a15 */
    {GPMC_A17, (M0 | PIN_OUTPUT)}, /* gpmc_a17.gpmc_a17 */
    {GPMC_A18, (M0 | PIN_OUTPUT)}, /* gpmc_a18.gpmc_a18 */
    {GPMC_A19, (M0 | PIN_OUTPUT)}, /* gpmc_a19.gpmc_a19 */
    {GPMC_A20, (M0 | PIN_OUTPUT)}, /* gpmc_a20.gpmc_a20 */
    {GPMC_A21, (M0 | PIN_OUTPUT)}, /* gpmc_a21.gpmc_a21 */
    {GPMC_A22, (M0 | PIN_OUTPUT)}, /* gpmc_a22.gpmc_a22 */
    {GPMC_A23, (M0 | PIN_OUTPUT)}, /* gpmc_a23.gpmc_a23 */
    {GPMC_A24, (M0 | PIN_OUTPUT)}, /* gpmc_a24.gpmc_a24 */
    {GPMC_A25, (M0 | PIN_OUTPUT)}, /* gpmc_a25.gpmc_a25 */
    {GPMC_A26, (M0 | PIN_OUTPUT)}, /* gpmc_a26.gpmc_a26 */
    {GPMC_A27, (M0 | PIN_OUTPUT)}, /* gpmc_a27.gpmc_a27 */
    {GPMC_CS1, (M0 | PIN_OUTPUT)}, /* gpmc_cs1.gpmc_cs1 */
    {GPMC_CS0, (M0 | PIN_OUTPUT)}, /* gpmc_cs0.gpmc_cs0 */
    {GPMC_CS2, (M0 | PIN_OUTPUT)}, /* gpmc_cs2.gpmc_cs2 */
    {GPMC_CS3, (M0 | PIN_OUTPUT)}, /* gpmc_cs3.gpmc_cs3 */
    {GPMC_CLK, (M8 | PIN_INPUT)}, /* gpmc_clk.i2c3_scl */
    {GPMC_ADVN_ALE, (M8 | PIN_INPUT)}, /* gpmc_advn_ale.i2c3_sda */
    {GPMC_OEN_REN, (M0 | PIN_OUTPUT)}, /* gpmc_oen_ren.gpmc_oen_ren */
    {GPMC_WEN, (M0 | PIN_OUTPUT)}, /* gpmc_wen.gpmc_wen */
    {GPMC_BEN0, (M0 | PIN_OUTPUT)}, /* gpmc_ben0.gpmc_ben0 */
    {GPMC_BEN1, (M0 | PIN_OUTPUT)}, /* gpmc_ben1.gpmc_ben1 */
    {GPMC_WAIT0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpmc_wait0 */
    {VIN2A_VSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_vsync0.gpio4_0 */
    {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */
    {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */
    {VIN2A_D4, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d4.gpio4_5 */
    {VIN2A_D5, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d5.gpio4_6 */
    {VIN2A_D6, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d6.gpio4_7 */
    {VIN2A_D7, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d7.gpio4_8 */
    {VIN2A_D8, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d8.gpio4_9 */
    {VIN2A_D9, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d9.gpio4_10 */
    {VIN2A_D10, (M3 | PIN_OUTPUT)}, /* vin2a_d10.mdio_mclk */
    {VIN2A_D11, (M3 | PIN_INPUT)}, /* vin2a_d11.mdio_d */
    {VIN2A_D12, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d12.gpio4_13 */
    {VIN2A_D13, (M14 | PIN_OUTPUT_PULLUP)}, /* vin2a_d13.gpio4_14 */
    {VIN2A_D14, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d14.gpio4_15 */
    {VIN2A_D15, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d15.gpio4_16 */
    {VIN2A_D16, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d16.gpio4_24 */
    {VIN2A_D17, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d17.gpio4_25 */
    {VIN2A_D18, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d18.gpio4_26 */
    {VIN2A_D19, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d19.gpio4_27 */
    {VIN2A_D20, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d20.gpio4_28 */
    {VIN2A_D21, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d21.gpio4_29 */
    {VIN2A_D22, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d22.gpio4_30 */
    {VIN2A_D23, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_d23.gpio4_31 */
    {MDIO_MCLK, (M3 | PIN_INPUT | SLEWCONTROL)}, /* mdio_mclk.mii0_col */
    {MDIO_D, (M3 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_d.mii0_txer */
    {RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */
    {UART3_RXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_rxd.mii0_rxdv */
    {UART3_TXD, (M3 | PIN_INPUT | SLEWCONTROL)}, /* uart3_txd.mii0_rxclk */
    {RGMII0_TXC, (M3 | PIN_INPUT)}, /* rgmii0_txc.mii0_rxd3 */
    {RGMII0_TXCTL, (M3 | PIN_INPUT)}, /* rgmii0_txctl.mii0_rxd2 */
    {RGMII0_TXD3, (M3 | PIN_INPUT)}, /* rgmii0_txd3.mii0_crs */
    {RGMII0_TXD2, (M3 | PIN_INPUT)}, /* rgmii0_txd2.mii0_rxer */
    {RGMII0_TXD1, (M3 | PIN_INPUT)}, /* rgmii0_txd1.mii0_rxd1 */
    {RGMII0_TXD0, (M3 | PIN_INPUT)}, /* rgmii0_txd0.mii0_rxd0 */
    {RGMII0_RXC, (M3 | PIN_INPUT)}, /* rgmii0_rxc.mii0_txclk */
    {RGMII0_RXCTL, (M3 | PIN_OUTPUT)}, /* rgmii0_rxctl.mii0_txd3 */
    {RGMII0_RXD3, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd3.mii0_txd2 */
    {RGMII0_RXD2, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd2.mii0_txen */
    {RGMII0_RXD1, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd1.mii0_txd1 */
    {RGMII0_RXD0, (M3 | PIN_OUTPUT)}, /* rgmii0_rxd0.mii0_txd0 */
    {GPIO6_14, (M3 | PIN_INPUT)}, /* gpio6_14.uart10_rxd */
    {GPIO6_15, (M3 | PIN_OUTPUT)}, /* gpio6_15.uart10_txd */
    {XREF_CLK0, (M11 | PIN_INPUT)}, /* xref_clk0.pr2_mii1_col */
    {XREF_CLK1, (M11 | PIN_INPUT)}, /* xref_clk1.pr2_mii1_crs */
    {MCASP1_ACLKX, (M11 | PIN_OUTPUT)}, /* mcasp1_aclkx.pr2_mdio_mdclk */
    {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */
    {MCASP1_ACLKR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.gpio5_0 */
    {MCASP1_FSR, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.gpio5_1 */
    {MCASP1_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */
    {MCASP1_AXR1, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */
    {MCASP1_AXR2, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr2.gpio5_4 */
    {MCASP1_AXR3, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr3.gpio5_5 */
    {MCASP1_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr4.gpio5_6 */
    {MCASP1_AXR5, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr5.gpio5_7 */
    {MCASP1_AXR6, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr6.gpio5_8 */
    {MCASP1_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp1_axr7.gpio5_9 */
    {MCASP1_AXR8, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */
    {MCASP1_AXR9, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */
    {MCASP1_AXR10, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */
    {MCASP1_AXR11, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */
    {MCASP1_AXR12, (M11 | PIN_OUTPUT | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */
    {MCASP1_AXR13, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */
    {MCASP1_AXR14, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr14.pr2_mii0_rxdv */
    {MCASP1_AXR15, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr15.pr2_mii0_rxd3 */
    {MCASP2_ACLKX, (M11 | PIN_INPUT)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */
    {MCASP2_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_fsx.pr2_mii0_rxd1 */
    {MCASP2_AXR2, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp2_axr2.pr2_mii0_rxd0 */
    {MCASP2_AXR4, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr4.gpio1_4 */
    {MCASP2_AXR7, (M14 | PIN_INPUT_PULLUP)}, /* mcasp2_axr7.gpio1_5 */
    {MCASP3_ACLKX, (M11 | PIN_INPUT)}, /* mcasp3_aclkx.pr2_mii0_crs */
    {MCASP3_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_fsx.pr2_mii0_col */
    {MCASP3_AXR0, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */
    {MCASP5_AXR0, (M4 | PIN_INPUT)}, /* mcasp5_axr0.uart3_rxd */
    {MCASP5_AXR1, (M4 | PIN_OUTPUT)}, /* mcasp5_axr1.uart3_txd */
    {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */
    {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */
    {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */
    {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */
    {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */
    {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */
    {MMC1_SDCD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.mmc1_sdcd */
    {MMC1_SDWP, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.mmc1_sdwp */
    {GPIO6_10, (M11 | PIN_INPUT)}, /* gpio6_10.pr2_mii_mt1_clk */
    {GPIO6_11, (M11 | PIN_OUTPUT)}, /* gpio6_11.pr2_mii1_txen */
    {MMC3_CLK, (M11 | PIN_OUTPUT)}, /* mmc3_clk.pr2_mii1_txd3 */
    {MMC3_CMD, (M11 | PIN_OUTPUT)}, /* mmc3_cmd.pr2_mii1_txd2 */
    {MMC3_DAT0, (M11 | PIN_OUTPUT)}, /* mmc3_dat0.pr2_mii1_txd1 */
    {MMC3_DAT1, (M11 | PIN_OUTPUT)}, /* mmc3_dat1.pr2_mii1_txd0 */
    {MMC3_DAT2, (M11 | PIN_INPUT)}, /* mmc3_dat2.pr2_mii_mr1_clk */
    {MMC3_DAT3, (M11 | PIN_INPUT)}, /* mmc3_dat3.pr2_mii1_rxdv */
    {MMC3_DAT4, (M11 | PIN_INPUT)}, /* mmc3_dat4.pr2_mii1_rxd3 */
    {MMC3_DAT5, (M11 | PIN_INPUT)}, /* mmc3_dat5.pr2_mii1_rxd2 */
    {MMC3_DAT6, (M11 | PIN_INPUT)}, /* mmc3_dat6.pr2_mii1_rxd1 */
    {MMC3_DAT7, (M11 | PIN_INPUT)}, /* mmc3_dat7.pr2_mii1_rxd0 */
    {SPI1_SCLK, (M0 | PIN_OUTPUT)}, /* spi1_sclk.spi1_sclk */
    {SPI1_D1, (M0 | PIN_OUTPUT)}, /* spi1_d1.spi1_d1 */
    {SPI1_D0, (M0 | PIN_INPUT)}, /* spi1_d0.spi1_d0 */
    {SPI1_CS0, (M0 | PIN_OUTPUT)}, /* spi1_cs0.spi1_cs0 */
    {SPI1_CS2, (M4 | PIN_OUTPUT | SLEWCONTROL)}, /* spi1_cs2.dcan2_tx */
    {SPI1_CS3, (M15 | PIN_INPUT)}, /* spi1_cs3.dcan2_rx */
    {DCAN1_TX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_tx.gpio1_14 */
    {DCAN1_RX, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* dcan1_rx.gpio1_15 */
    {UART1_RXD, (M0 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
    {UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
    {UART1_CTSN, (M0 | PIN_INPUT)}, /* uart1_ctsn.uart1_ctsn */
    {UART1_RTSN, (M0 | PIN_OUTPUT)}, /* uart1_rtsn.uart1_rtsn */
    {UART2_RXD, (M5 | PIN_INPUT)}, /* uart2_rxd.uart1_dcdn */
    {UART2_CTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.gpio1_16 */
    {UART2_RTSN, (M14 | PIN_INPUT_PULLUP)}, /* uart2_rtsn.gpio1_17 */
    {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */
    {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */
    {I2C2_SDA, (M0 | PIN_INPUT)}, /* i2c2_sda.i2c2_sda */
    {I2C2_SCL, (M0 | PIN_INPUT)}, /* i2c2_scl.i2c2_scl */
    {WAKEUP0, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup0.gpio1_0 */
    {WAKEUP3, (M14 | PIN_INPUT_PULLUP)}, /* Wakeup3.gpio1_3 */


    Thanks,
    Gourav
  • Keep in mind u-boot's purpose is to get Linux running and not to fully exercise every capability of your hardware.  That being the case, there's likely not any changes needed if you have designed your board similar to the TI board.  If a specific issues emerges then we may need to re-examine, but as a general porting guideline there is nothing specific you would need to change in the u-boot device tree.

  • Gourav,

    Since we haven't heard back from you,. I'm going to assume you have moved beyond this. If not, please reply back with an update. Thanks.
  • Gourav,

    On a related note, there is some brand new tooling that should be helpful in your situation. Please see the files here:

    git.ti.com/.../padconf

    There's a README discussing the overall usage, but in short you can dump all the padconf registers to a rd1 file and then parse them into a CSV with a python script. That would be a good way to verify that things are configured as you would expect.

    Brad