AM5K2E02: Booting from NAND Flash Issues

/*
 *
 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 
 * 
 * All rights reserved.
 *  
 *
*/
#include "types.h"
#include "device.h"
#include "bootconfig.h"
#include "bootlog.h"
#include "tiboot.h"
#include "ecc.h"
#include "i2c.h"
#include "nand.h"
#include "device_nand.h"
#include "bootproc.h"
#include "bootTrace.h"
#include "utlrepck.h"
#include "cacheapi.h"

#ifdef BOOTCONFIG_INCLUDE_NAND

#ifdef BOOTCONFIG_N_BOOTLOG_ENTRIES
#pragma DATA_SECTION (fname, ".fname")
#pragma DATA_ALIGN (fname, 4)
static char const fname[] = __FILE__;
#endif
  

const UINT32 nandBootDataTypes[] = BOOTCONFIG_NAND_IMAGE_TYPES;

/*********************************************************************************************************
 * Data declaration: Where to store data. For non-secure devices this is just used to hold a single 
 *                   page of data. The first page in the NAND will contain the actual download size
 *                   and location. 
 *
 *                   secure aware block begin
 *                      For Secure devices the entire image will be placed here, and the table 
 *                      of contents information will be used to determine the read size
 *                   secure aware block end
 *
 **********************************************************************************************************/
#pragma DATA_SECTION(nandBootData, ".nandData")
UINT8 nandBootData[BOOTCONFIG_NAND_BOOT_MAX_PAGE_SIZE_BYTES];

#pragma DATA_SECTION(nandScratch, ".nandScratch")
UINT8 nandScratch[BOOTCONFIG_NAND_BOOT_MAX_PAGE_SIZE_BYTES];


/*********************************************************************************************************
 * Data declaration: Where to store spare bytes of a pages. These bytes contain bad block markings and
 *                   ECC data for a page.
 *********************************************************************************************************/
#pragma DATA_SECTION(nandEccData, ".nandEccData")
UINT8 nandEccData[BOOTCONFIG_NAND_BOOT_MAX_SPARE_PAGE_BYTES];
    

/*********************************************************************************************************
 * FUNCTION PURPOSE: Initialize the nand boot parameter table based on pin-strapped value latched at reset
 *********************************************************************************************************
 * DESCRIPTION: The initial table is constructed from default and pin-strapped values
 *********************************************************************************************************/
void bootInitBootParamsNand (BOOT_PARAMS_NAND_T *bootParams)
{
  UINT32 v;

  bootTrace ((UINT32)bootParams);

  bootParams->length    = sizeof (BOOT_PARAMS_NAND_T);
  bootParams->checksum  = 0;
  bootParams->boot_mode = BOOT_MODE_NAND;
  bootParams->portNum   = chipDefaultNandPortNum ();

  v = chipDefaultNandPll ();
  bootParams->swPllCfg_msw = chipUpper16 (v);
  bootParams->swPllCfg_lsw = chipLower16 (v);

  v = chipDefaultNandPll2 ();
  bootParams->swPll2Cfg_msw = chipUpper16 (v);
  bootParams->swPll2Cfg_lsw = chipLower16 (v);

  bootParams->sysFreqMhz  = chipSysFreqMhz ();
  bootParams->coreFreqMhz = chipCoreFreqMhz ();

  bootParams->options = chipDefaultNandClearMode () | BOOT_PARAMS_NAND_OPTIONS_READ_GEOMETRY;

  bootParams->numColumnAddrBytes = chipDefaultNandNumColumnAddrBytes ();
  bootParams->numRowAddrBytes    = chipDefaultNandNumRowAddrBytes ();

  v = chipDefaultNandNumDataBytesPerPage ();
  bootParams->numDataBytesPerPage_msw = chipUpper16 (v);
  bootParams->numDataBytesPerPage_lsw = chipLower16 (v);

  bootParams->numPagesPerBlock     = chipDefaultNandNumPagesPerBlock ();
  bootParams->busWidth             = chipDefaultNandBusWidth ();
  bootParams->numSpareBytesPerPage = chipDefaultNandNumSpareBytesPerPage ();
  

  bootParams->csNum      = chipDefaultNandcsNum();   
  bootParams->firstBlock = chipDefaultNandFirstBlock ();
}
    


/*********************************************************************************************************
 * FILE PURPOSE: Perform a NAND boot
 *********************************************************************************************************
 * DESCRIPTION: One complete block of memory is read from the NAND and placed into boot image area.
 *              Returns 0 on success, -1 on failure 
 *********************************************************************************************************/
SINT32 bootMainNand (BOOT_PARAMS_NAND_T *bootParams)
{
  nandPredefConfig_t  predef;

  NAND_InfoObj    NandInfo;     
  NAND_InfoHandle hNandInfo;
                                                       
  UINT32         ret;

  UINT32         currentBlock;
  UINT32         currentPage;
  UINT32         i;

  BOOL           validGeometry = FALSE;
  BOOL           moreData;

  UINT8         *pData;

  bootTrace ((UINT32)bootParams);
 
  /* Signal the host that nand boot is about to start */
  chipIndReadyToHost ();

  /* do some system settings for NAND boot */
  chipSystemNand();  

  hNandInfo = &NandInfo;
  hNandInfo->CSOffset = bootParams->csNum - BOOT_PARAMS_NAND_CS_2;  /* re-index to 0 based */

  chipStatusNandSetCSRegion(hNandInfo->CSOffset);

  hNandInfo->memBuffer = nandBootData;
  hNandInfo->spareByteBuffer = nandEccData; 

  /* Read the geometry from an I2C if required */
  if ((bootParams->options & BOOT_PARAMS_NAND_OPTIONS_GEOMETRY_MASK) == BOOT_PARAMS_NAND_OPTIONS_GEOMETRY_FROM_PARAMS)
  {

    predef.numColumnAddrBytes    = bootParams->numColumnAddrBytes;
    predef.numRowAddrBytes       = bootParams->numRowAddrBytes;
    predef.numDataBytesPerPage   = chipForm32 (bootParams->numDataBytesPerPage_msw, bootParams->numDataBytesPerPage_lsw);
    predef.numPagesPerBlock      = bootParams->numPagesPerBlock;
    predef.busWidth              = bootParams->busWidth;
    predef.numSpareBytesPerPage  = bootParams->numSpareBytesPerPage;
    predef.csNum                 = bootParams->csNum - BOOT_PARAMS_NAND_CS_2;   /* Boot params indexes the value from 2 */

    ret = nandImportParams (hNandInfo, &predef);
    if (ret != NAND_RET_OK)  
    {
      bootLogEntry ((char *)fname, __LINE__, (SINT32)ret);
      return (-1);
    }

    // Use the NAND geometry read from the I2C EEPROM
    validGeometry = TRUE;
  }

  // If we don't already have the NAND geometry - try ONFI and legacy (non-ONFI) devices
  if (validGeometry == FALSE)
  {
    validGeometry = hwNandGetGeometry(hNandInfo);
      
    if (validGeometry == FALSE)
    { 
      bootLogEntry ((char *)fname, __LINE__, 0);
      return (-1);
   }
  }

  /* Update boot progress */
  if (hNandInfo->isONFI == TRUE)
    chipStatusNandSetOnfi(1);
  else
    chipStatusNandSetOnfi(0);

  
  /* Boot progress page size is in units of 512 bytes (the division is done by the function) */
  chipStatusNandSetPageSize(hNandInfo->dataBytesPerPage);

  /* Boot progress pages per block is 2^(x+6) (handled in the function) */
  chipStatusNandSetPagesPerBlock(hNandInfo->pagesPerBlock);

  /* Have a valid geometry. Start reading pages and passing the data to the data handler.
   * Keep track of the total number of bytes read */

  // We now know the NAND geometry, update EMIF bus access size to match the hardware capabilities. 
  DEVICE_NAND_setEmifBusWidth(hNandInfo->busWidth, hNandInfo->CSOffset); 

  /* Set the clear nand mode */
  if ((bootParams->options & BOOT_PARAMS_NAND_OPTIONS_CLEAR) != 0)
    hNandInfo->clearNand  = TRUE;
  else
    hNandInfo->clearNand = FALSE;
   
  // Start with page 0 on first block
  currentBlock = bootParams->firstBlock;
  currentPage  = 0;

  // Initialize the boot data processeor
  bootDataProcessInit ((UINT32 *)nandBootDataTypes);
    
  do
  {

    chipStatusNandSetBlock(currentBlock);
    chipStatusNandSetPage(currentPage);
    // Read a page (includes bad block checking and correcting page data using ECC
    ret = hwNandReadPage(hNandInfo, currentBlock, currentPage);

    pData = nandBootData;

    // For boot table data the received byte data must be repacked to 16 bit words if the read
    // was from 8 bit nand

    if (hNandInfo->busWidth == DEVICE_BUSWIDTH_8BIT)  {
    
        for (i = 0; nandBootDataTypes[i] != 0; i++)  {

            if ((nandBootDataTypes[i] == BOOT_IMAGE_TYPE_BTBL) ||
                (nandBootDataTypes[i] == BOOT_IMAGE_TYPE_BTBL_BLOCKED_SEC))  {

                utlCopyBigEndianByteStreamToWords (nandBootData, nandScratch, 0, hNandInfo->dataBytesPerPage, 0);
                pData = nandScratch;
                break;
            }

        }

    }


    // Was the page read successful? If not, skip to the next block and try again.
    if (ret != NAND_RET_OK)
    {
      // Skip to the next block
      currentBlock = currentBlock + 1;

      // Start with first page on the new block
      currentPage = 0;

      // Initialize the boot data processeor, but only if the fail was due to an ecc problem
      if (ret == NAND_BOOT_ERROR_READ_PAGE_NOT_CORRECTED)  {
        chipStatusNandIncEccFail();
        bootDataProcessInit ((UINT32 *)nandBootDataTypes);
      }
      
      // Stay in the read data loop when starting on a new block
      moreData = TRUE;
    }  
    else
    {
      // Pass the data to the boot processing function. 
      // It will return TRUE if more data is needed.
      moreData = bootDataProcess (pData, hNandInfo->dataBytesPerPage, (UINT32 *)nandBootDataTypes, TRUE);

      // Is there more of the boot image to read from the NAND flash?
      if (moreData == TRUE)  
      {
        // Update page pointer for this block   
        currentPage = currentPage + 1;
             
        // Does this block have another page to read?
        if (currentPage >= hNandInfo->pagesPerBlock)  
        {
          // Ran out of pages on this block, start reading from the next
          bootLogEntry ((char *)fname, __LINE__, (SINT32)NAND_BOOT_IMAGE_ON_MULTIPLE_BLOCKS);

          // Skip to the next block
          currentBlock  = currentBlock + 1;
 
          // Start with first page on the new block
          currentPage = 0;  
        }
      }
    }  
  } while (moreData == TRUE);

  /* The boot data was successfully processed */
  if (*p_boot_entry_addr != 0)
    return (NAND_RET_OK);
  else
    return (-1);
}
                

#endif /* BOOTCONFIG_INCLUDE_NAND */