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AM5748: WDT_TIMER1 availabillity

Part Number: AM5748

Hi again,

Relating to closed thread: AM5748: WD timers clock source

Thanks for the info, but I have some doubts, that there is a WD_TIMER1 available.

The AM5748 Datasheet: www.ti.com/.../am5748 stated:

 

Which sounds quite inconsistent.

And in the TRM for AM5748 www.ti.com/.../spruih8
 

The info regarding the WD_TIMER1 in the TRM is quite marginally.

Are you sure, that there is a WD_TIMER1?

Best Regards, Jimmy

  • Jimmy,

    I am checking on this and will get back to you.  I agree that the text in the DM is confusing.  There are actually many watchdog timers in the device.  There are watchdog timers for each MPU core: MPU_WD_TIMER_C[0:1].  There are also watchdog timers in the eQEP logic blocks and in the PRU-ICSS subsystems.  However, none of this helps you.  WD_TIMER2 is a global watchdog timer that operates in the Always On power domain and it can reset the whole chip.  I agree that TRM details about WD_TIMER1 are very thin.  I will let you know what I find.

    Tom

  • Jimmy,

    It appears that WD_TIMER1 was removed from the design during the device prototyping.  I am not sure of the reason.  We will be updating the DM and TRM to remove the confusing text and table entries.  Unfortunately, the only chip-level watchdog available is WD_TIMER2 that is derived from OSC0 -> SYSCLK1/610.

    Tom

  • Jimmy,

    I have a correction.  WD_TIMER1 does exist but its use is only defined for use in security enabled devices.  It is further documented in the addendum documents that are only provided to customers who have a signed agreement to receive this information.  Therefore, for general purpose devices, you are limited to WD_TIMER2 that is derived from OSC0 -> SYSCLK1/610 as we had previously determined.  I am having the DM updated to avoid this confusion.

    Tom

  • Hi Tom,

    Thanks for the update, then I know how to proceed.

    BR Jimmy