AM3354: 18-bit display configuration

Hi,

Color assignments configured in Figure 2 for RGB888 mode for 24 bit mode.

Please explain about color assignments configured for  XRGB8888 mode to 18-bit panel in 32 bpp??

Previous post

"Your LCD connections are correct, at least from the pinmux you have posted. Since the LCD driver works in 24-bit mode, and you need to omit the 2 LSB for each color to connect to an 18-bit display, there will be colors missing on your display and you cannot expect to see a perfectly smooth gradient. There is no workaround for this, except switching to a 24-bit LCD and connecting all LCD data lines."

You told, colors missing on this display.expected to see a perfect smoothness on gradient issue.

Give solution to without switching 24-bit lcd,  display a gradient smoothness on 18 bit lcd panel in XRGB8888 mode.

Regards,

SanthanaKumarS 

Biser,

Please provide tilcdc driver patches for 18 bit lcd data lines configured in 32 bit per pixel .  

Hi Santhana,

I recommend you to please review the file "tilcdc.txt" located under the following directory "<kernel_dir>/Documentation/devicetree/bindings/display/tilcdc". The blue-and-red-wiring should be set according to the board design, so the board design defines which color modes can be used. If the wiring is straight then the "XBGR8888" format supported but if the wiring is crossed then "XRGB8888" format is supported.

Regards,
Krunal

Orunal,

Whatever you told we checked on that tilcdc.txt. hardware connections is correct & driver configurations also correct . But we are able to face gradient on that 18 bit display .Can you please check another post raised my question.

Okay, I will be closing the current thread and work on addressing your gradient issue on the following thread.

Regards,
Krunal

Will give a brief statement of your following points 

"hardware/software are configured for the custom board"

Hardware Configurations:      

Lcd Part Number : hsd070idw1-e13 

&lcdc {
compatible = "ti,am33xx-tilcdc";
ti,no-reset-on-init;
ti,no-idle-on-init;

status = "okay";

blue-and-red-wiring = "crossed";
};

panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <1>;
fifo-th = <6>;
};

display-timings {
800x480p62 {
clock-frequency = <36000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <40>;
hsync-len = <48>;
vback-porch = <29>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};

lcd_pins: pinmux_lcd_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8E0, PIN_OUTPUT | MUX_MODE0) /* (U5) lcd_vsync.lcd_vsync */
AM33XX_IOPAD(0x8E4, PIN_OUTPUT | MUX_MODE0) /* (R5) lcd_hsync.lcd_hsync */
AM33XX_IOPAD(0x8E8, PIN_OUTPUT | MUX_MODE0) /* (V5) lcd_pclk.lcd_pclk */
AM33XX_IOPAD(0x8EC, PIN_OUTPUT | MUX_MODE0) /* (R6) lcd_ac_bias_en.lcd_ac_bias_en */
AM33XX_IOPAD(0x83C, PIN_OUTPUT | MUX_MODE1) /* (U13) gpmc_ad15.lcd_data16: R0 */
AM33XX_IOPAD(0x8A0, PIN_OUTPUT | MUX_MODE0) /* (R1) lcd_data0.lcd_data0: R1 */
AM33XX_IOPAD(0x8A4, PIN_OUTPUT | MUX_MODE0) /* (R2) lcd_data1.lcd_data1: R2 */
AM33XX_IOPAD(0x8A8, PIN_OUTPUT | MUX_MODE0) /* (R3) lcd_data2.lcd_data2: R3 */
AM33XX_IOPAD(0x8AC, PIN_OUTPUT | MUX_MODE0) /* (R4) lcd_data3.lcd_data3: R4 */
AM33XX_IOPAD(0x8B0, PIN_OUTPUT | MUX_MODE0) /* (T1) lcd_data4.lcd_data4: R5 */
AM33XX_IOPAD(0x8B4, PIN_OUTPUT | MUX_MODE0) /* (T2) lcd_data5.lcd_data5: G0 */
AM33XX_IOPAD(0x8B8, PIN_OUTPUT | MUX_MODE0) /* (T3) lcd_data6.lcd_data6: G1 */
AM33XX_IOPAD(0x8BC, PIN_OUTPUT | MUX_MODE0) /* (T4) lcd_data7.lcd_data7: G2 */
AM33XX_IOPAD(0x8C0, PIN_OUTPUT | MUX_MODE0) /* (U1) lcd_data8.lcd_data8: G3 */
AM33XX_IOPAD(0x8C4, PIN_OUTPUT | MUX_MODE0) /* (U2) lcd_data9.lcd_data9: G4 */
AM33XX_IOPAD(0x8C8, PIN_OUTPUT | MUX_MODE0) /* (U3) lcd_data10.lcd_data10: G5 */
AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1) /* (V13) gpmc_ad14.lcd_data17: B0 */
AM33XX_IOPAD(0x8CC, PIN_OUTPUT | MUX_MODE0) /* (U4) lcd_data11.lcd_data11: B1 */
AM33XX_IOPAD(0x8D0, PIN_OUTPUT | MUX_MODE0) /* (V2) lcd_data12.lcd_data12: B2 */
AM33XX_IOPAD(0x8D4, PIN_OUTPUT | MUX_MODE0) /* (V3) lcd_data13.lcd_data13: B3 */
AM33XX_IOPAD(0x8D8, PIN_OUTPUT | MUX_MODE0) /* (V4) lcd_data14.lcd_data14: B4 */
AM33XX_IOPAD(0x8DC, PIN_OUTPUT | MUX_MODE0) /* (T5) lcd_data15.lcd_data15: B5 */

AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7 ) /* (R13) gpio1[16]: 11V_EN */
>;
};

Software Configurations: 

Referrence in Processor-sdk-04.01.00.06 kernel v4.9

blue-and-red-wiring = "crossed";

Tilcdc format - static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565, DRM_FORMAT_RGB888, DRM_FORMAT_XRGB8888 };

based on red and blue wires it will select tilcdc format,pixel format.

DRM_FORMAT_XRGB8888  { .format = DRM_FORMAT_XRGB8888, .depth = 24, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },

Using DRM to configure color depth,bit per pixels. 

Color depth = 24 , Bpp = 32 

Above images are not generated, i suggested to give example for  8 bit & 10 bit display image color to cause color banding.

In the previous post, Not mentioning gradient observed in yocto  PSDK v6.0.1. trying to build my source on PSDK v6.0.1 to see gradient issues are there or not.