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AM5718: EMIF configuration problem

Rakesh Muralidharan
Expert 2810 points
Part Number: AM5718

Hi,

 I have interfaced  DDR3L Part no: MT41K256M16TW-107:P (part no mentioned in AM5718 BOM) to AM5718.

I am trying to create EMIF configuration using the EMIF spreadsheet. Attached is the spread sheet. I have modified the following section as shown. Latency I have updated to 13ns as per the data sheet of memory.

On Step3 DDRtimings I see  parameter tCKESR  final bit value shaded in yellow. Is this OK??

SpreaEMIF_RegisterConfig.rardsheet

DDR datasMT41K256M16TW-107 XITP TR.pdfheet

 

  • 0
    TI__Guru* 85990 points

    Rakesh, you should plug in 5tCK for tCKESR.  It looks to be a detail that can be easily missed:

    The datasheet says tCKE for DDR3-1866 is "Greater of 3CK or 5ns".  With a clock rate of 666MHz, that would be the greater of 3*1.5=4.5ns or 5ns, which would be 5ns.

    Since tCKESR is tCKE+tCK, that would make tCKESR min = 6.5ns.  To determine the number of clock cycles, then 6.5/1.5 = 4.3tCK,  To cover the fractional portion, TCKESR should be set to 5tCK.

    Regards,

    James