Compiler/AM5728: how to config 4G DDR3L(MT41K512M16VRN-107 IT:P) on AM5728

Hi Ken,

Can you take a look at this one: https://e2e.ti.com/support/processors/f/791/t/724117?Linux-AM5728-4GB-DDR-memory-configuration

Best Regards,
Keerthy

Hi, Keerthy

At above thread, it say:

You should look at the dra7xx evm.c file to see how they manage to set the 4GB ddr.

Try adding the following in am57xx_evm.h:
#define CONFIG_VERY_BIG_RAM
#define CONFIG_NR_DRAM_BANKS 2
#define CONFIG_MAX_MEM_MAPPED 0x80000000

If just the above doesn't work, try adding the following code in dram_init_banksize() (see common/board_f.c):
int dram_init_banksize(void)
{
u64 ram_size;

ram_size = board_ti_get_emif_size();

gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();
if (ram_size > CONFIG_MAX_MEM_MAPPED) {
gd->bd->bi_dram[1].start = 0x200000000;
gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
}

return 0;
}

but my SDK don't have board_ti_get_emif_size function. I have try below  one, but the available DDR still 2G.

__weak void dram_init_banksize(void)
{
#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)

gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();

#endif
}

Could you help? Thanks

Ken

Configuring AM57xx u-boot for 4GB is a common question that comes up, and we correspondingly added the documentation into the EMIF Tools App Note:

AM57x, DRA7x, and TDA2x EMIF Tools
http://www.ti.com/lit/sprac36

Specifically please read Section 3.3.4.3 Supporting 4GB Memory.  I just noticed one minor error.  The following line belongs in am57xx_evm_defconfig:

CONFIG_PHYS_64BIT=y

The app note lists that as an addition to am57xx_evm.h which is not correct.

For the kernel please be sure your defconfig has:

CONFIG_ARM_LPAE=y

Hi, Brad

I have config CONFIG_PHYS_64BIT=y, and follow the emif tool to change the emif registers value.

When I try to set below lisa register, the system can't bright up during boot.

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_0 = 0x00000000,
.dmm_lisa_map_1 = 0x00000000,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

with above lisa setting, boot hung here:

U-Boot SPL 2016.05 (Dec 16 2020 - 20:43:44)
DRA752-GP ES2.0
Trying to boot from MMC1
reading args
spl_load_image_fat_os: error reading image args, err - -1
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img

U-Boot 2016.05 (Dec 16 2020 - 20:43:44 +0800)

U-Boot code: 80800000 -> 8084DB70 BSS: -> 8089C910
CPU : DRA752-GP ES2.0
Model: TI AM5728 BeagleBoard-X15
Board: AM572x EVM REV A.30
I2C: ready
DRAM: >>sdram_init()
Monitor len: 0009C910
Ram size: 80000000
Ram top: 00000000
TLB table from ffff0000 to ffff4000
Reserving 626k for U-Boot at: fff53000
Reserving 16448k for malloc() at: fef43000
Reserving 88 Bytes for Board Info at: fef42fa8
Reserving 216 Bytes for Global Data at: fef42ed0
Reserving 81376 Bytes for FDT at: fef2f0f0
setup_dram_config
xmtech am 0

RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 0 0 Bytes

DRAM: 2 GiB
New Stack Pointer is: fef2f0d0
Relocation Offset is: 7f753000
Relocating to fff53000, new gd at fef42ed0, sp at fef2f0d0

------------------------------------------------------------------------------------------

But for below default code it can bring up normally for 2G memory.

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1
};

Could you help for this? Thanks

Ken

For below default code it can bring up normally for 2G memory.

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_3 = 0x80740300,
.is_ma_present = 0x1
};

uboot log: 

U-Boot 2016.05 (Dec 16 2020 - 20:17:37 +0800)

U-Boot code: 80800000 -> 8084DB70 BSS: -> 8089C910
CPU : DRA752-GP ES2.0
Model: TI AM5728 BeagleBoard-X15
Board: AM572x EVM REV A.30
I2C: ready
DRAM: >>sdram_init()
Monitor len: 0009C910
Ram size: 80000000
Ram top: 00000000
TLB table from ffff0000 to ffff4000
Reserving 626k for U-Boot at: fff53000
Reserving 16448k for malloc() at: fef43000
Reserving 88 Bytes for Board Info at: fef42fa8
Reserving 216 Bytes for Global Data at: fef42ed0
Reserving 81376 Bytes for FDT at: fef2f0f0
setup_dram_config
xmtech am 0

RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 0 0 Bytes

DRAM: 2 GiB
New Stack Pointer is: fef2f0d0
Relocation Offset is: 7f753000
Relocating to fff53000, new gd at fef42ed0, sp at fef2f0d0
MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1

** Unable to use mmc 1:1 for loading the env **
Using default environment

SCSI: SATA link 0 timeout.
AHCI 0001.0300 32 slots 1 ports 3 Gbps 0x1 impl SATA mode
flags: 64bit ncq stag pm led clo only pmp pio slum part ccc apst
scanning bus for devices...
Found 0 device(s).
Net: Could not get PHY for ethernet@48484000: addr 0

Warning: ethernet@48484000 using MAC address from ROM
eth0: ethernet@48484000
Hit any key to stop autoboot: 0
Saving Environment to FAT...

** Unable to use mmc 1:1 for saveenv **
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
reading boot.scr
** Unable to read file boot.scr **
reading uEnv.txt
574 bytes read in 5 ms (111.3 KiB/s)
Loaded env from uEnv.txt
Importing environment from mmc0 ...
switch to partitions #0, OK
mmc0 is current device
SD/MMC found on device 0
5596792 bytes read in 506 ms (10.5 MiB/s)
105230 bytes read in 23 ms (4.4 MiB/s)
Booting from mmc0 ...
Kernel image @ 0x82000000 [ 0x000000 - 0x556678 ]
## Flattened Device Tree blob at 88000000
Booting using the fdt blob at 0x88000000
Loading Device Tree to 8ffe3000, end 8ffffb0d ... OK

Starting kernel ...

Please zip and attach:

• Your defconfig
• am57xx_evm.h
• Your board.c file

Given that it is still showing up as 2GB of RAM, it seems that something is not correct in your code still.

4g_ddr.rar

Hi, Brad

Please help to check the attache zip file. Thanks!

BTW,  (1) For this ctrl_ioregs which generate by emif tool , I don't change anything in my code, I'm not sure how to change.

const struct ctrl_ioregs AM572x_DDR3L_532MHz_TI_AM572x_IDK_ctrl_ioregs = {
.ctrl_ddr3ch = 0x80808080,
.ctrl_ddrch = 0x40404040,
.ctrl_ddrio_0 = 0x00094A40,
.ctrl_ddrio_1 = 0x04A52000,
.ctrl_lpddr2ch = 0x00404000
.ctrl_emif_sdram_config_ext = 0x0000C123
};

(2) And the ext_phy_regs  generate by emif tool is empty, I don't change in code either.

const unsigned int AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs [] = {
, /* EMIF1_EXT_PHY_CTRL_1 */
, /* EMIF1_EXT_PHY_CTRL_2 */
, /* EMIF1_EXT_PHY_CTRL_3 */
, /* EMIF1_EXT_PHY_CTRL_4 */
, /* EMIF1_EXT_PHY_CTRL_5 */
, /* EMIF1_EXT_PHY_CTRL_6 */
, /* EMIF1_EXT_PHY_CTRL_7 */
, /* EMIF1_EXT_PHY_CTRL_8 */
, /* EMIF1_EXT_PHY_CTRL_9 */
, /* EMIF1_EXT_PHY_CTRL_10 */
, /* EMIF1_EXT_PHY_CTRL_11 */
, /* EMIF1_EXT_PHY_CTRL_12 */
, /* EMIF1_EXT_PHY_CTRL_13 */

Thanks

You didn't include your defconfig.  Are you sure that you have CONFIG_PHYS_64BIT=y in there?

user5947671 said:

U-Boot 2016.05 (Dec 16 2020 - 20:17:37 +0800)

I just realized that you are on a very old version of u-boot. I don't know if 4GB support was tested/supported this far back.  I looked a bit more at the code to see if I can find any issues.   One thing I noticed is that the board_ti_get_emif1_size() function is getting this information from the EEPROM.  If you don't have an EEPROM (complete with magic word in the header, etc.) then it simply returns 0.  That looks like what you're seeing.  Can you try just hard-coding ram_size as 4GB, e.g. ram_size = 0x100000000?

user5947671 said:

(2) And the ext_phy_regs  generate by emif tool is empty, I don't change in code either.

const unsigned int AM572x_DDR3L_532MHz_TI_AM572x_IDK_emif1_ext_phy_regs [] = { 
, /* EMIF1_EXT_PHY_CTRL_1 */ 
, /* EMIF1_EXT_PHY_CTRL_2 */ 
, /* EMIF1_EXT_PHY_CTRL_3 */ 
, /* EMIF1_EXT_PHY_CTRL_4 */ 
, /* EMIF1_EXT_PHY_CTRL_5 */ 
, /* EMIF1_EXT_PHY_CTRL_6 */ 
, /* EMIF1_EXT_PHY_CTRL_7 */ 
, /* EMIF1_EXT_PHY_CTRL_8 */ 
, /* EMIF1_EXT_PHY_CTRL_9 */ 
, /* EMIF1_EXT_PHY_CTRL_10 */ 
, /* EMIF1_EXT_PHY_CTRL_11 */ 
, /* EMIF1_EXT_PHY_CTRL_12 */ 
, /* EMIF1_EXT_PHY_CTRL_13 */

You have to enable macros in Excel in order to compute these values.  Here's what that looks like for me:

0602.4g_ddr.rar

Hi, Brad

Attached file including the defconfig. 

I enable the macros in excel and it have phy ext reg now.

But when I replace the lisa map and the related emif_reg, ext_phy_reg generate by tool, the uboot totally don't work, don't print anthing.

Can you help to check the attached file?

Thank you very much!

Regards,

Ken

If I hard encoding ram_size, uboot will not print anthing either. 

void dram_init_banksize(void)
{
u64 ram_size;

ram_size = board_ti_get_emif1_size() + board_ti_get_emif2_size();
ram_size = 0x100000000;
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = get_effective_memsize();
printf("xmtech am gd->bd->bi_dram[0].size:%lld\n",gd->bd->bi_dram[0].size);
if (ram_size > CONFIG_MAX_MEM_MAPPED) {
gd->bd->bi_dram[1].start = 0x200000000;
gd->bd->bi_dram[1].size = 0x100000000 - CONFIG_MAX_MEM_MAPPED;
printf("xmtech am_2\n");
}
}

Hi, Brad

4336.4g_ddr.rar

Big thanks for your professional and quick nice reply.

1. Attached file including the defconfig file.

2. I had enable the excel macros ,and after that the ext_phy_ctrl_reg could be generated;

After I use the lisa map above suggest, the uboot will not work.

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_0 = 0x00000000,
.dmm_lisa_map_1 = 0x00000000,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

3.I had copy emif_reg and ext_phy_ctrl_reg generate by emif tool, uboot not work ethier.

4.Could you help to review my code which attached? especially the emif tool config is right or not depend on DDR3L(MT41K512M16VRN-107 IT:P) 

5. 'One thing I noticed is that the board_ti_get_emif1_size() function is getting this information from the EEPROM.  If you don't have an EEPROM (complete with magic word in the header, etc.) then it simply returns 0. '  , How can I get infomation from EEPROM? We had EEPROM hardware in our design.

Thanks again.

Ken

Hi, Brad

(1) After we do follow config then found the 4G ram size in uboot, but still will hung.

change include\asm-generic\u-boot.h the types of start and size to u64:

struct {   /* RAM configuration */
  u64 start;
  u64 size;
 } bi_dram[CONFIG_NR_DRAM_BANKS];   /* we defined CONFIG_NR_DRAM_BANKS as 2 */

Detail log show as below:

U-Boot SPL 2016.05 (Dec 20 2020 - 00:14:56)
DRA752-GP ES2.0
Trying to boot from MMC1
reading args
spl_load_image_fat_os: error reading image args, err - -1
reading u-boot.img
reading u-boot.img
reading u-boot.img
reading u-boot.img

U-Boot 2016.05 (Dec 20 2020 - 00:14:56 +0800)

U-Boot code: 80800000 -> 8084DB80 BSS: -> 8089C950
CPU : DRA752-GP ES2.0
Model: TI AM5728 BeagleBoard-X15
Board: AM572x EVM REV A.30
I2C: ready
DRAM: >>sdram_init()
Monitor len: 0009C950
Ram size: 80000000
Ram top: 00000000
TLB table from ffff0000 to ffff4000
Reserving 626k for U-Boot at: fff53000
Reserving 16448k for malloc() at: fef43000
Reserving 104 Bytes for Board Info at: fef42f98
Reserving 216 Bytes for Global Data at: fef42ec0
Reserving 81376 Bytes for FDT at: fef2f0e0
setup_dram_config
xmtech am
xmtech am gd->bd->bi_dram[0].size: 2147483648xmtech am_2

RAM Configuration:
Bank #0: 80000000 2 GiB
Bank #1: 200000000 2 GiB

DRAM: 4 GiB
New Stack Pointer is: fef2f0c0
Relocation Offset is: 7f753000
Relocating to fff53000, new gd at fef42ec0, sp at fef2f0c0

(2) when you mean enable CONFIG_ARM_LPAE=y  in defconfig, do you mean do it in this file? configs/am57xx_evm_defconfig

Do you have any suggestion? 

Very appreciate for your great help, thank you very much!

Ken

Does it work with your updated lisa config?

This entry creates a hole in the memory:

.dmm_lisa_map_3 = 0xFF020100,

The hole is the final 16MB of the 32-bit memory map. Looks like SP is pointing into that hole.

It not work. I have updated the lisa map.

This is the lisa map config at my board.c

static const struct dmm_lisa_map_regs beagle_x15_lisa_regs = {
.dmm_lisa_map_0 = 0x0,
 .dmm_lisa_map_1 = 0x0,
.dmm_lisa_map_2 = 0x80740300,
.dmm_lisa_map_3 = 0xFF020100,
.is_ma_present = 0x1
};

Thanks

Try deleting lisa_map_3.

Hi, Brad

One more question, if I delete dmm_lisa_map_3 = 0xFF020100, does the DDR have  interweave? Will it cause some potential issue? Thanks

Regards,

Ken