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IWR1443: IS25LP080D - QE bit set

Part Number: IWR1443
Other Parts Discussed in Thread: UNIFLASH

Hello,

customer use the IWR1443(rev3.0) with the MX25V8035 from Macronix and it is running well. Due to delivery issues they want to use IS25LP080D from ISSI. Unfortunately, it doesn't work. In the app note "Serial Data FLASH Supported" (SPRACH9C), the distinction is "QE bit set by ROM bootloader in SOP5" for the Macronix and "QE bit set" set at the ISSI. What exactly does that mean?

Any other idea why the IS25LP080D doesn't work?

Regards, Holger

  • Holger,

           For the MX25V8035 parts shows in the Digikey distribution channel as parts are available. 

    If you need any help from the Macronix team to ship the part to your customer place directly we could enable that channel to overcome supply problems. Do let us know. 

    For the IS25LP080D Quad enable bit need to be set high to be able to operate in the Quad SPI mode. 

    It appears that by default Quad enable bit is not set, this need to be enabled to operate in Quad mode.

    You could request manufacturer to set it by default  before shipping the part, or enable it by other means, As this bit is non-volatile bit, once it's enabled then it would be fine.  

    Thanks and regards,

    CHETHAN KUMAR Y.B.

  • Hello Chethan,

    due to purchasing restriction they can't buy at Digikey.

    He set the OE bit now but without success. Any other hints?

    Regards, Holger

  • Holger,

        If the Digikey is not acceptable then, We could ship the flashes directly to the customer place from the flash vendor.

    Please share the details over the mail, where the flashes need to be shipped. 

    Please refer below E2E thread for the flash requirements and exact flash part number that has been tested.

    https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/639898/awr1642-is-possible-to-connect-a-general-spi-flash-on-qspi-interface

    https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/656273/awr1642-compatible-spi-flash-list-in-awr1642-es2-0/2413062?tisearch=e2e-sitesearch&keymatch=IS25LP080D#2413062

    Thanks and regards,

    CHETHAN KUMAR Y.B.

  • Hello Chetan,

    customer had a working PCB with the MX25V8035. On this PCB there is the IWR1443, the MX25V8035 and an STM32 MCU. The STM is connected to the QSPI, too. It can stop the IWR1443. It can talk with the QSPI flash in QSPI-Mode! They use this to install/update the firmware for the IWR1443.

    Then he removed the MX25V8035 and placedl the IS25LP080D. They could program the firmware in the IS25LP080D and it could be read. They could set the QE bit in the status register. And when he read back the status register after a powercycle it is 0xFC. That means QE bit is set and it is also write protected. So it should work.

    Noe when he start the IWR1443 he can see that there happens heavy data transmission on the four QSPI-Datalines. So he thought the IWR is reading something. But it did not start their software. Any idea why it doesn't start?

    Question:
    The IS25LP080 had an additional autoboot mode that is made special for this kind of boot-experience and that has some register for timing and address, because it is working without a special read-command.
    Is this mode used by the IW1443? And in case it is used, did you have some example value for the Start Delay?

    Regards, Holger

  • one more questions:
    which SDK version does support the ISSI flash memory? May be they use an older SDK which doesn't support ISSI? Could that be the reason?

    Regards, Holger

  • Hello,

    they checked their SW. The first SDK routine initialize the QSPI-Flash and it only knows Spansion and Macronix, but not the ID of ISSI. It seems that this is still the case in the latest SDK. Is ISSI support planed for the next SDK?

    Regards, Holger

  • Holger,

         Is the flash writing (firmware for the IWR1443) is done through the STM32 MCU? without using uniflash tool. 

    Device would support secondary boot loading feature in the following link provided in the SDK package 

    C:\ti\mmwave_sdk_03_0x_00_0x\packages\ti\utils\sbl

    /cfs-file/__key/communityserver-discussions-components-files/1023/0458.SBL_5F00_design.pdf

    If there is a reading from flash fails, device would assert NERROR signal, Could you please confirm NERROR is being asserted? 

    If it's asserted one could read the ESM status (Error status monitoring) register by connecting JTAG lines and see what for what condition error has occurred.  It is possible If there are checksum/parity failures seen during the flash read operation it would captured in the ESM status register. 

    Bootloader uses SFDP command, The SFLASH Discoverable Parameters (SFDP) command is issued to retrieve the JEDEC compliant response that includes information regarding the SFLASH capabilities and command set. On successful reception of the SFDP response, the information is used to communicate with the SDF and further interpret the contents and load the images.

    For more details on the bootloader https://www.ti.com/lit/an/swra561b/swra561b.pdf 

    If ISSI is complaint to SFDP command and format, then our device would be able to recognize the flash. 

    Thanks and regards,

    CHETHAN KUMAR Y.B.

  • Hello Chethan,
    now it is working.

    The IWR will boot from ISSI without any problems if the QE bit is set! This was only not visible to them because their firmware first calls the QSPI initialization function from the SDK and then hangs because the QSPI is initialized. Here the chip ID is read and unfortunately the ISSI is not yet known.

    More specifically, the function:

    QSPI_open(&QSPIParams, &ERRCODE);

    from the TI SDK.

    So it seems that the IWR supports the ISSI, but its SDK does not yet.

    Regards, Holger

  • Holger,

        Thank you for the confirmation, Yes, that was my first suggestion and also stated in the app-note, QE bit need to be set, By default from the manufacturer it's not.  

    Yes, SDK currently doesn't support ISSI flash driver yet. I will give this feedback to SDK team to improve in future. 

    Thanks and regards,

    CHETHAN KUMAR Y.B.