This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AWR2944: How to write adcbuff through software,and how to trigger interrupt(frame start ,frame end ,chirp start)

Part Number: AWR2944

HI,

I want write date to adcbuff, and trigger interrup used to implement  Hardware in Loop (HIL).

but when i set regist through the following settings.

I still can't write data to adcbuff,Do i need some other setting steps?

Regards,

guilin.shi

  • Hello guilin.shi,

    Could you share with me the exact steps you are using for writing to the ADC buffer and which address you are utilizing?

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    Here's my code to write adcbuff.

    ============

    #define WR_MEM_32(addrdata)    *(volatile unsigned int *)(addr) = (unsigned int)(data)
    #define HIL_enableHilADCBufWrite()      WR_MEM_32(0x05020000+0x2D00x00020000U)
    func()
    {
    HIL_enableHilADCBufWrite();
    *(volatile unsigned int *)(0xA4000000) = 0x1111;
    }

    ============

    Here's my code to trigger interrup.

    I don't know if this code works,The register corresponding to the technical manual is not described.

    In the following description, there is no difference between these interrupts.

    =================

    #define enableHilADCInt()           WR_MEM_32(0x02120000+0x67C0x00000010U);WR_MEM_32(0x02120000+0x67C0x00000011U)
    #define disableHilADCInt()          WR_MEM_32(0x02120000+0x67C0x00000000U)
    #define activateFrameStartInt()     WR_MEM_32(0x02120000+0x67C0x00001000U);WR_MEM_32(0x02120000+0x67C0x00001100U)
    #define activateFrameEndtInt()      WR_MEM_32(0x02120000+0x67C0x00100000U);WR_MEM_32(0x02120000+0x67C0x00110000U)
    #define activateChirpInt()          WR_MEM_32(0x02120000+0x67C0x10000000U);WR_MEM_32(0x02120000+0x67C0x11000000U)

    =================

    Regards,

    guilin.shi

  • Hello guilin shi,

    Are you sending these commands from the Transmitter? or are you trying to configure this HIL_enableHilADCBufWrite() from the receiver? How are you syncing the transmitter and receiver? 
    Are you utilizing the DMM? Are you configuring the DMM Destination registers in your code?

    Regards,
    Saswat Kumar

  • Hello Saswat ,

     

    I sending these commands from the Transmitter, It is hoped that the adcbuff register can be write into the state through the instruction.

    I want to trigger the interrupt to syncing the transmitter and receiver.

    0x02120000+0x67C is DMM register for sync.(Just i think, i don't know if it's right)

    Regards,

    guilin.shi

  • Hello Saswat ,

     I have a question,If I want to write data to adcbuff,Can I write only through the DMM module, or can I configure the DMM module and write through other modules(For example CSI2,either or program write drectly)?

    If can  write data by other modele, what configuration steps are required for the DMM module.

    Regards,

    guilin.shi

  • Hello shi guillin,

    So, the DMM module needs to be configured for this. Let me try to see if there is any document in the TRM or anywhere regarding the same.
    The DMM needs to be configured by the transmitter so that you see the data on the ADC.

    Could you also confirm if you are seeing the data on the L3 like I had mentioned in the previous thread?

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    yes, i can seeing the data one the L3 when csi2 receive date.

    this is my L3 address (0x8822CDC0).

     

    Regards,

    guilin.shi

  • Hello Shi guillin,

    That means the data is present, now we need to figure which steps are missing to activate the ADC Buffer write. The below mentioned code is on the AWR2944 side executed if I am not wrong right? 

    #define WR_MEM_32(addrdata)    *(volatile unsigned int *)(addr) = (unsigned int)(data)
    #define HIL_enableHilADCBufWrite()      WR_MEM_32(0x05020000+0x2D00x00020000U)
    func()
    {
    HIL_enableHilADCBufWrite();
    *(volatile unsigned int *)(0xA4000000) = 0x1111;
    }

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    That't tight, i can recevie date and write it to L3.

    Now, i want write it to ADCBuff,i want activate the ADC Buffer write by that code,but the ADCBuffer write not activate.

    i want know how to activate the ADC buffer write.

     

    Regards,

    guilin.shi

  • Hello Shi Guillin,

    The activation of ADC buffer needs to be done from the transmitter by writing to the DMM not by implementing the code on the AWR2944.
    Could you please confirm this once?

    The below mentioned code is on the AWR2944 side executed if I am not wrong right?

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    At present, I want use the software  activation of ADC buffer. 

    I read the information , AWR2944 can  realization HIL by CSI2 and DMM mode.

    CSI2 mode recevie date, DMM control AWR2944 register(one Trace mode).

    CSI2 send message to DMM mode to activation of ADC buffer,

    because csi2 and DMM all in AWR2944,i want activation of ADC buffer by awr2944 software.

    if the activation of ADC buffer needs by writing to the DMM, how to used DMM  CSI mode (trace only mode).

    how to config DMM hardware and software. 

     

    Regards,

    guilin.shi

  • Hello Saswat ,

     I solved the problem by below case, The adc buffer can activation by software and write date to it.

    I haven't switch write to pong so as to read from ping, so i can't see write date in 0xA5000000 when i write date to 0xA400000.

     https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/1078713/awr2944-awr2944/3992772?tisearch=e2e-sitesearch&keymatch=awr2944%2520dmm#3992772

    =========

    volatile uint32_t rd_data_HIL[10], addr, count, data_write[10];
    volatile bool flag = true;

    CSL_rss_ctrlRegs *rssCtrl;
    rssCtrl = (CSL_rss_ctrlRegs *)CSL_RSS_CTRL_U_BASE;

    //Memory intialization of ADCBUF memories
    CSL_FINS(rssCtrl->RSS_ADCBUF_PING_MEMINIT, RSS_CTRL_RSS_ADCBUF_PING_MEMINIT_RSS_ADCBUF_PING_MEMINIT_START, 0x1);
    while(!(CSL_FEXT(rssCtrl->RSS_ADCBUF_PING_MEMINIT_DONE, RSS_CTRL_RSS_ADCBUF_PING_MEMINIT_DONE_RSS_ADCBUF_PING_MEMINIT_DONE_DONE))==0x1);
    CSL_FINS(rssCtrl->RSS_ADCBUF_PONG_MEMINIT, RSS_CTRL_RSS_ADCBUF_PONG_MEMINIT_RSS_ADCBUF_PONG_MEMINIT_START, 0x1);
    while(!(CSL_FEXT(rssCtrl->RSS_ADCBUF_PONG_MEMINIT_DONE, RSS_CTRL_RSS_ADCBUF_PONG_MEMINIT_DONE_RSS_ADCBUF_PONG_MEMINIT_DONE_DONE))==0x1);

    CSL_FINS(rssCtrl->DMMSWINT1, RSS_CTRL_DMMSWINT1_DMMSWINT1_DMMADCBUFWREN,0x1);

    //Write to the memory location
    for(count = 0; count<10; ++count)
    {
    addr = CSL_RSS_ADCBUF_WRITE_U_BASE+0x4*count;
    WR_MEM_32(addr, 0x12345678+count);
    data_write[count] = 0x12345678+count;
    }

    //Switch write to pong so as to read from ping
    CSL_FINS(rssCtrl->DMMSWINT1, RSS_CTRL_DMMSWINT1_DMMSWINT1_DMMADCBUFPINPONSEL,0x1);

    //Make a read from appropriate RAM location
    for(count = 0; count<10; ++count)
    {
    rd_data_HIL[count] = RD_MEM_32(CSL_RSS_ADCBUF_READ_U_BASE+0x4*count);
    }

    for(count = 0; count<10; ++count)
    {
    if(data_write[count]!=rd_data_HIL[count])
    {
    flag = false;
    break;
    }
    }

    if(flag)
    {
    test_print("ADCBuf HIL mode read and write is correct and successful!!\n");
    }
    else
    {
    test_print("ADCBuf HIL mode read and write is incorrect??\n");
    }

    =========

    Thank you for your support!!!

     

    Regards,

    guilin.shi

  • Hello Saswat ,


    One more question, how to trigger interrupt(frame start ,frame end ,chirp start),let's DPC program running to processing data.

     

    Regards,

    guilin.shi

  • Hello shi guillin,

    Based on your configuration all of this is being done by the receiver, which will function.
    But the issue with this is, it is very hard to maintain the timing between the transmitter and the receiver.
    That is why, the initial configuration of the DMM needs to be done in the receiver, but for switching the adc ping/ pong and for enabling the other interrupts, you will have to use a separate virtual channel in the transmitter for the DMM commands, which will enable all these interrupts to be driven from the DMM instead of it being driven by the receiver.

    Regards,
    Saswat Kumar

  • Hello Saswat ,


    Because the transmitter need to adapt to other functions,so i usee software replace DMM function.

    When i send date to adcbuff,how can i trigger interrupt(frame start ,frame end ,chirp start).(if used DMM mode ,what information do I need to send to DMM)

    I tried the code in the technical manual,but it no used.

    ==========

     

    Regards,

    guilin.shi

  • Hi shi guillin,

    Let me check if theres any official document for the DMM module in the AWR2944.

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    I found the register to trigger interrupt(frame start  ,chirp avaliable).

    ====================

    0x02120678     set 0x00110000u    frame start
    0x02120678     set 0x11000000u    chirp avaliable

     I didn't find the relevant documents. I found them by running the code.

    If you have relevant documents, please share them with me. Thank you.

    Regards,

    guilin.shi

  • Hello Shi Guillin,

    Were you able to trigger it?

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    Yes, I can trigger it in the above way.

    Regards,

    guilin.shi

  • Hello shi guillin,

    If you are able to proceed then I will close this thread for now, you can reopen it by replying back on this thread on the same related issue.

    Regards,
    Saswat Kumar

  • Hello Saswat ,

    Ok,Thank you for your support!!!

    Regards,

    guilin.shi