Other Parts Discussed in Thread: LP87524J-Q1, AWR2243
In a previous question and answer, I saw such a discussion...
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[Synchronize clock purpose on PMIC and IWR6843AOP]:
Usually it's used for EMI purposes, so there is a master clock that the PMIC will use for switching.
It will avoid beats in the lower frequency bands and make the behavior more predictable.
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[Q1] This means that the low-frequency switching noise of the BUCK circuit in the PMIC may be input to the antenna IC (IWR6843AOP), causing the antenna IC to suffer from low-frequency EMI problems, which in turn affects performance.
Is the above understanding correct?
[Q2] To synchronize the clock on the PMIC and IWR6843AOP, it is connected by [IWR6843AOP] PIN "PMIC_CLKOUT" to [LP87524J-Q1] PIN "CLKIN".
Then what is the output oscillation frequency of [IWR6843AOP] PIN " PMIC_CLKOUT in HMz?
*Not found in the DATASHEET, this data is needed to know how to set the register " EXT_CLK_FREQ[4:0] " of [LP87524J-Q1].
