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AFE3010: The Alarm signal cannot be removed

Zoe Yang
Intellectual 2210 points
Part Number: AFE3010

Dear team,

My customer is having trouble when using AFE3010. The alarm signal is kept turning on as blue channel. Yellow channel is SCR signal. The high level pulse width of yellow channel is 10ms。 The blue channel width is 1.2s.

How did that happened? And how to remove the alarm signal? Is the schematic has any problem? Looking forward to your reply!

 

  • 0
    TI__Mastermind 32395 points

    Hello valued engineer,

    I am looking this over and will respond shortly.

    Sincerely,

    Peter

  • 0 in reply to Peter Iliya
    TI__Mastermind 32395 points

    Hello Zoe,

    The behavior observed with the oscilloscope is a normal device response to a detected fault or a failing self-test (see Figure 9 of datasheet). I presume a self-test because you are not including a real ground fault in the operation.

    Looking at the schematic there is one clear reason device is failing self test: The SCR and SCR_TST pins are not connected to an actual SCR + solenoid circuit as shown in the datasheet typical schematic. It seems you are trying to design a system that does not use a solenoid to open the load switch. If this is the case, then you may not be able to use the SCR self test feature, which means you should disable SCR self test by setting SEL pin to floating.

    It may be possible that SCR self test could work with SCR_TST connected to the collector a transistor, but it may not because it was designed to test for operation of a SCR.

    Either way, I recommend the following to get your system working.

    1. Depopulate transistor Q43. It does not appear this transistor serves any useful function. It is also not a good idea to drain charge from the C198 and C188 capacitors.

    2. Depopulate R352 and connect SCR_TST to PH pin directly. Even when SCR self test is disabled (SEL=floating), the SCR_TST pin is still performing a continuous self test where it is looking for LINE zero crossings, thus it still needs to be pulled up to the line voltage (full wave or single rectified).

    3. Test your system after these changes.

    4. If your system is still failing, then short out R359. The total resistance of R350 and R359 may be too high for device to pass its basic self test via the FT pin.

    5. If system still is not working, then should verify that you have the correct system gain (transformer + RFB) such that system trips at 5mArms. If this is not set accurately, then device may still not be able to detect the self-test via the FT pin.

    After all of this is fixed, but you still want the SCR self-test feature (although it would be a BJT self-test feature), then you will have to make following board changes:

    1. Transistor's (Q44) collector would have to be pulled up to the LINE (IP-240L) through a diode + resistor and/or inductor (as shown in the typical schematic).
    2. Additionally, you would want to connect SCR_TST directly to the Q44 collector with resistor of value between 50kOhm and 69kOhm, preferable the larger value to help with power dissipation. Calculate necessary power here with Prms = (LINE_peak - 20V^2)/(68kOhm*2*SQRT(2)). I calculate needing a resistor with at least 0.63 W rating.
    3. Set SEL=GND
    4. Re-test the system to see if device can pass the SCR self test.

    I have attached a calculator that shows how I make power calculations for various resistors.

    4111.AFE3010 BOM_calculations.xlsx

    Please post back with any development and/or question.

    Sincerely,

    Peter

  • 0 in reply to Peter Iliya
    TI__Intellectual 2210 points

    Peter,

    Thanks for your detailed explanation for this trouble shooting!

    I have attached customer modified circuit under your suggestions. NC means removed, MD means modified or added. R359/R350 changed to 

    But after floating SEL, after power up 7seconds, appears SCR signal but still can not be cleared the alarm. 

    What else can be modified here? Thanks!

  • 0 in reply to Zoe Yang
    TI__Mastermind 32395 points

    Hello Zoe,

    What is the modified value of R388?

    In fact what are all of the new values for modified components?

    The next thing to do is to make sure your current transformer and amplifier gain are tuned so device trips at 5 mArms. And this makes sense because a self-test failure are a few seconds means device is not passing periodic self-test, as opposed to immediately failing a continuous self test (watch dog timer).

    I would probe OUT, SCR, and LINE. First, make sure that the polarity of VOUT and IP-240L are 180 degrees out of phase.

    Then, make sure that R350+R359 are small enough such that device can pass self test. Vout should fall to about 1.9V for AFE3010 to detect this pulse as shown in Figure 17 of datasheet.

    Lastly, insert a variable leakage fault and start from 0 mArms and slowly increase to see where the system trips. Adjust R333 to get the proper tripping threshold.

    You can find this procedure in datasheet shown below:

    '

    Sincerely,

    Peter

  • 0 in reply to Peter Iliya
    TI__Intellectual 2210 points

    Hi peter,

    My customer update their latest schematic and I attached on line. There are still some abnormal phenomenon when leak current being detect.

    GFCI单独板A1 0708.pdf

    1.When leak current occurs, will trigger twice SCR signal ,which is different in description with our datasheet. Pink is SCR signal, blue is alarm.

    2.Sometimes the pulse width of alarm signal is different. Why?

  • 0 in reply to Peter Iliya
    TI__Intellectual 2210 points

    This is the waveform of 2nd question with different pulse width of Alarm.

  • 0 in reply to Peter Iliya
    TI__Intellectual 2210 points

    This is why occur twice SCR when detect leak current. 

  • 0 in reply to Zoe Yang
    TI__Mastermind 32395 points

    Hello,

    1. Sometimes SCR can be on between 1/2 cycle and 2 continuous line cycles depending on where the line phase is at when AFE3010 determines there is a fault.

            However the figure you sent does show two separate pulses. Did this event occur in response to a real ground fault? It is possible that SCR pin is sourcing current beyond its capability and therefore the voltage collapses and then it thinks it has to re-fire again. Could customer confirm the base currents into Q44 and Q1 (they could measure differential voltage across R2 and R3 during the SCR pulse). I would try to keep the total SCR current at < 2mA peak. I base this upon the final test specification of SCR current driver in datasheet.

    2. The different ALARM pulses is due to the line phase at the point AFE3010 determines a fault. The ALARM only will fire during the positive half-cycle of line as shown in Figure 9. So if ALARM begins blinking, but there is only 5ms left in the positive phase of line, then ALARMS first pulse will only last 5ms.

    Here is my review of the schematic

    1. I still see no point the Q44 circuit and would remove this.

    2. Whether or not Q44 is removed, I would make sure SCRTST is connected to the collector of Q1 via a 68 kOhm resistor. Since Q1 is responsible for actually opening load switch I assume, then ensuring this BJT works is more important than Q44.

    3. Change R9 and R10 into just one resistance with 68 kOhm.

    4. What are the reasons for D16 and D1. These do not seem necessary and I would remove these.

    Sincerely,

    Peter