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Clarification on the Extended STOP MASK.

Part Number: TDC7201

Hi, Issa

I'm sorry, but I can't respond within the context of past discussions. Therefore, I'm opening a new question.

https://e2e.ti.com/support/sensors-group/sensors/f/sensors-forum/1249144/tdc7201-what-is-the-actual-impact-range-of-the-clock-counter-stop-mask

In a previous discussion, you mentioned:
"But for some additional detail, say if your STOP mask is set to 125ns but the STOP pulse went high at 100ns and your pulse has a length of 30ns. This means that your pulse will go low at 130ns which is past the 125ns STOP mask. If the device has a rising edge STOP polarity, this will not trigger a measurement since the rising edge will only be detected after the STOP mask."

In other words, when the STOP is configured to detect the falling edge, it will be detected.

Furthermore, in document section 7.3.3.3 titled "Clock Counter STOP Mask," it states:
"The Clock Counter is started by the first rising edge of the external CLOCK after the START signal (see Figure 23)."

In other words, when the MASK window is set to 1, the mask time will be less than 62.5ns. Is my understanding correct?

Additionally, according to section 6.3 Recommended Operating Conditions for Mode 1 measurements, there is a minimum required time interval of 12ns between START and STOP requests. In other words, if the START/STOP settings are configured to detect the rising edge, but the rising edge of STOP occurs within 12ns, the TOF reading will be zero. Is this correct?

Best,

Raimu

  • Hello Raimu,

    Please see my notes below.

    In other words, when the STOP is configured to detect the falling edge, it will be detected. 

    Yes, your understanding is correct.  The rising or falling edge must be outside of the stop mask in order to be detected.

    In other words, when the MASK window is set to 1, the mask time will be less than 62.5ns. Is my understanding correct?

    The mask window when set to 1 will be based on tclock.  At 16MHz clock, this will be 62.5ns.  With an 8MHz clock, this is 125ns.    

    Additionally, according to section 6.3 Recommended Operating Conditions for Mode 1 measurements, there is a minimum required time interval of 12ns between START and STOP requests. In other words, if the START/STOP settings are configured to detect the rising edge, but the rising edge of STOP occurs within 12ns, the TOF reading will be zero. Is this correct?

    Yes, that is correct.  In your example, the stop occurs too soon to be detected and would not register as a "stop".  

  • Hi, Eddle

    I'm sorry, but I still have some questions about the following.

    "I understand that at 16MHz, it's 62.5ns, and at 8MHz, it's 125ns. However, my question is, with the mask window set to 1 and using a 16MHz clock, if the Start signal is detected at 31ns, then the actual STOP masking time would be 16.5ns. This is because the counting starts after the Start signal, at the first rising edge. Is my understanding correct?"

    Best,

    Raimu

  • Raimu,

    I don't understand how you are calculating an actual STOP mask time of 16.5ns.  Could you expand on that?

    Depending on where the clock cycle is at when the rising edge of the of the start signal is detected would determine an additional amount of time to the STOP mask.  In your example, the start signal is detected at 31ns, so there is still 31.5ns before the clock counter is running.  This would make the actual mask time 94ns (62.5ns + 31.5ns). 

  • Hi, Eddle


    I am sorry, please disregard the 16.5ns; that was a typo.

    Thank you for the explanation, it helped me clarify the issue.

    Best

    Raimu