I have a doubt about the memory maps of the AWR294x:
Firstly, if all of the module's memory can be accessed by those three cores (MSS, DSS and RSS) through the different address;
Secondly, for example is the DSP_L2 at the DSP Subsystem C66x with the base address 0x00800000 same as the DSP_L2 at the Main Subsystem Cortex R5F with base address 0x80800000?
Thirdly, if the answer to the second question is yes, then does that means the 0x00800000 only can be access by the DSP Subsystem C66x, and the 0x80800000 only can be accessed by the Main Subsystem Cortex R5F? and the DSP Subsystem C66x can access this physical address with less time because of the DSP_L2 is the DSP Subsystem C66x local memory?