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OPT3101: Application issues

Reed
Expert 1650 points
Part Number: OPT3101

Hi,

Using OPT3101 and SUPER HDR mode, after calibration, about 1% of the products showed a large distance deviation within 0.2 meters (actual testing at 0.1 meters was 0.3-0.4 meters). Analysis showed that the problematic product used a large current instead of a small current at close range. The normal product used a TX0 H current at 0.1M, while the problematic product used a TX1 H current at 0.1M. After the problem occurred, replacing the receiver tube can improve the problem. We use OSRAM branded transmitting and receiving tubes. We sent the problematic receiver tube to the supplier for testing, and the result was that the quality of the receiver tube was not a problem. The relevant performance parameters were within their specification range, and the supplier provided feedback that there were no problems with the same model of transmitting and receiving tube used by other manufacturers. So we suspect that there may be a problem with the software or hardware design. Please help analyze it, thank you!
The hardware design is based on the recommended design, and the current parameter configuration is as follows:

void OPT3101::device::initialize(void){

// List of registers to initialize OPT3101 device after power-up

this->reg.force_en_slave = 1; // //Since I2C Master bus is floating this register needs to be set to enable device to respond

this->reg.tg_ovl_window_start = 7000; // //Overload flab observation window
this->reg.en_temp_conv = 1; // //Enables the internal

this->reg.clip_mode_fc = 1; // //Enables Clip mode for Frequency correction
this->reg.clip_mode_temp = 0; // //Disables Clip mode for Temp coff phase correction
this->reg.clip_mode_offset = 0; // //Disables Clip mode for phase offset correction
this->reg.iq_read_data_sel = 3; // //Enables 16 bit frame counter
this->reg.iamb_max_sel = 12; // //Sets maximum ambient support
this->reg.en_temp_corr = 1; // //Enables Temperature Correction
this->reg.gpio1_obuf_en=1; // //Enabled output buffer on GPIO1 pin
this->reg.gpo1_mux_sel=2; // //select dig_gpo_0 on gpio1
this->reg.dig_gpo_sel0 = 9; // //Select Data Ready on dig_gpo_0

this->reg.num_sub_frames = 79; // //Sub frames count
this->reg.num_avg_sub_frames = 63; // //Average frames count
this->reg.xtalk_filt_time_const = 4; // //Crosstalk filter time constant
this->reg.tg_seq_int_start = 9850; // //Sequence Start
this->reg.tg_seq_int_end = 9858; // //Sequence End
this->reg.tg_seq_int_mask_start = 63; // //Same as AvgFrame Count
this->reg.tg_seq_int_mask_end = 63; // //Same as AvgFrame Count

this->reg.command0 = 0x108; // //Set Channel 1
this->reg.command1 = 0xB02; // //COMP1.
this->reg.command2 = 0x100; // //Set Channel 0
this->reg.command3 = 0xC00; // //COMP1_INV
this->reg.compare_reg1 = 26000; // //ThresholdH
this->reg.compare_reg2 = 4312; // //ThresholdH
this->reg.mux_sel_compin = 0; // //Selects Amplitude for Comparison
this->reg.en_tx1_on_tx0 = 1; // //Setting TX1 register and connect to TX0

this->reg.en_processor_values = 1; // //Enables processor values
this->reg.en_sequencer = 1; // //Enables the Sequencer
this->reg.hdr_thr_high = 25500; // //High Threshold
this->reg.hdr_thr_low = 4812; // //Low Threshold
this->reg.en_adaptive_hdr = 1; // //Enables adaptive HDR feature

this->reg.illum_dac_h_tx0 = 7; // //High Current settings [009.8mA:1.4mA X 07]
this->reg.illum_scale_h_tx0 = 3; // //Illum scale for H [009.8mA:1.4mA X 07]

this->reg.illum_dac_l_tx0 = 1; // //High Current settings [002.8mA:2.8mA X 01]
this->reg.illum_scale_l_tx0 = 2; // //Illum scale for H [002.8mA:2.8mA X 01]

this->reg.illum_dac_h_tx1 = 28; // //High Current settings [156.8mA:5.6mA X 28]
this->reg.illum_scale_h_tx1 = 0; // //Illum scale for H [156.8mA:5.6mA X 28]

this->reg.illum_dac_l_tx1 = 7; // //High Current settings [039.2mA:5.6mA X 07]
this->reg.illum_scale_l_tx1 = 0; // //Illum scale for H [039.2mA:5.6mA X 07]

this->reg.tg_en = 1; // //Enables Timing Generator

this->configurationFlags_xtalkFilterTau = 4; // //This is not a register but a settings flag for the SDK
this->configurationFlags_monoshotMode = false; // //This is not a register but a settings flag for the SDK
this->configurationFlags_xtalkSettlingOneTauInMilliSeconds = 320; // //This is not a register but a settings flag for the SDK
this->configurationFlags_xtalkSettlingOneTauInDataReadyCounts = 16; // //This is not a register but a settings flag for the SDK
this->configurationFlags_frameTimeInMilliSeconds = 20; // //This is not a register but a settings flag for the SDK
this->configurationFlags_avgFrameCountExponentOfTwo = 6; // //This is not a register but a settings flag for the SDK

}

OPT3101::device::device(void):
configurationFlags_isTXChannelActive{true,true,false},
configurationFlags_isRegisterSetActive{true,true} {}

OPT3101::calibrationC::calibrationC(void) : calibrationC(true) {
this->recordLength = 4; // //This configuration requires 4 crosstalk and other configuration record(s)
this->registerAddressListSize= 36; // //This configuration requires 36 registers [1152] bits to be stored for calibration
this->EEPROM_connected = false; // //This configuration helps configure EEPROM
this->extTempSensor_connected= true; // //This configuration helps configure Ext temp sensor
this->registerAddressList[0] = 0x2f; // //Address for register(s) iphase_xtalk_reg_hdr0_tx0,temp_coeff_main_hdr1_tx1
this->registerAddressList[1] = 0x30; // //Address for register(s) qphase_xtalk_reg_hdr0_tx0,temp_coeff_main_hdr1_tx1
this->registerAddressList[2] = 0x38; // //Address for register(s) temp_coeff_xtalk_iphase_hdr0_tx0
this->registerAddressList[3] = 0x39; // //Address for register(s) temp_coeff_xtalk_qphase_hdr0_tx0
this->registerAddressList[4] = 0x42; // //Address for register(s) phase_offset_hdr0_tx0
this->registerAddressList[5] = 0x47; // //Address for register(s) tmain_calib_hdr0_tx0,tillum_calib_hdr0_tx0
this->registerAddressList[6] = 0x45; // //Address for register(s) temp_coeff_main_hdr0_tx0
this->registerAddressList[7] = 0x46; // //Address for register(s) temp_coeff_illum_hdr0_tx0
this->registerAddressList[8] = 0x31; // //Address for register(s) iphase_xtalk_reg_hdr1_tx0
this->registerAddressList[9] = 0x32; // //Address for register(s) qphase_xtalk_reg_hdr1_tx0
this->registerAddressList[10] = 0x5e; // //Address for register(s) temp_coeff_xtalk_iphase_hdr1_tx0,temp_coeff_xtalk_iphase_hdr0_tx1
this->registerAddressList[11] = 0x60; // //Address for register(s) temp_coeff_xtalk_qphase_hdr1_tx0,temp_coeff_xtalk_qphase_hdr0_tx1,temp_coeff_xtalk_qphase_hdr1_tx1
this->registerAddressList[12] = 0x51; // //Address for register(s) phase_offset_hdr1_tx0,temp_coeff_illum_hdr1_tx0
this->registerAddressList[13] = 0x48; // //Address for register(s) tmain_calib_hdr1_tx0,tillum_calib_hdr1_tx0
this->registerAddressList[14] = 0x2d; // //Address for register(s) temp_coeff_main_hdr1_tx0,temp_coeff_main_hdr0_tx1
this->registerAddressList[15] = 0x52; // //Address for register(s) temp_coeff_illum_hdr1_tx0,phase_offset_hdr0_tx1
this->registerAddressList[16] = 0x33; // //Address for register(s) iphase_xtalk_reg_hdr0_tx1
this->registerAddressList[17] = 0x34; // //Address for register(s) qphase_xtalk_reg_hdr0_tx1
this->registerAddressList[18] = 0x49; // //Address for register(s) tmain_calib_hdr0_tx1,tillum_calib_hdr0_tx1
this->registerAddressList[19] = 0x53; // //Address for register(s) temp_coeff_illum_hdr0_tx1,phase_offset_hdr1_tx1
this->registerAddressList[20] = 0x54; // //Address for register(s) temp_coeff_illum_hdr0_tx1
this->registerAddressList[21] = 0x35; // //Address for register(s) iphase_xtalk_reg_hdr1_tx1
this->registerAddressList[22] = 0x36; // //Address for register(s) qphase_xtalk_reg_hdr1_tx1
this->registerAddressList[23] = 0x5f; // //Address for register(s) temp_coeff_xtalk_iphase_hdr1_tx1
this->registerAddressList[24] = 0x41; // //Address for register(s) tmain_calib_hdr1_tx1
this->registerAddressList[25] = 0x43; // //Address for register(s) tillum_calib_hdr1_tx1,en_phase_corr,en_temp_corr,scale_phase_temp_coeff
this->registerAddressList[26] = 0x55; // //Address for register(s) temp_coeff_illum_hdr1_tx1
this->registerAddressList[27] = 0x56; // //Address for register(s) temp_coeff_illum_hdr1_tx1
this->registerAddressList[28] = 0x2e; // //Address for register(s) illum_xtalk_reg_scale
this->registerAddressList[29] = 0x3a; // //Address for register(s) scale_temp_coeff_xtalk
this->registerAddressList[30] = 0x71; // //Address for register(s) shift_illum_phase
this->registerAddressList[31] = 0xb5; // //Address for register(s) scale_amb_phase_corr_coeff
this->registerAddressList[32] = 0x0c; // //Address for register(s) amb_phase_corr_pwl_coeff0
this->registerAddressList[33] = 0xb4; // //Address for register(s) amb_phase_corr_pwl_coeff1,amb_phase_corr_pwl_coeff2,amb_phase_corr_pwl_coeff3
this->registerAddressList[34] = 0xb8; // //Address for register(s) amb_phase_corr_pwl_x0,amb_phase_corr_pwl_x1
this->registerAddressList[35] = 0xb9; // //Address for register(s) amb_phase_corr_pwl_x2

}

The schematic diagram is as follows:

M151-TOF V02 20230201 (002).pdf

  • 0
    TI__Genius 9310 points

    Reed,

      It sounds like the calibration is not quite right. In HDR mode you will have 4 currents. In HDR mode, the current can switch between 2 current settings on one TX channel, and with super-HDR, TX1 can be used to add 2 more current settings.

    The currents are set in the Configurator tool based on the design of your system. Then output the cpp by selecting the create configuration file in the lower right corner. Replace the existing "OPT3101_configuration.cpp" with the new file.

    You need to determine the correct distances for each current. The documentation recommends doing phase offset calibration at a target distance where the amplitude is between 16000-24000. The preset values in the SDK are arbitrary and definitely don’t follow this rule. The values are set like below in OPT3101Coefficients.cpp.

     

    void environmentalController::manuallySetReferenceDistances(){

           this->refDistancesInMM[0][0]=50;

           this->refDistancesInMM[0][1]=120;

           this->refDistancesInMM[1][0]=60;

           this->refDistancesInMM[1][1]=150;

           this->refDistancesInMM[2][0]=0;

           this->refDistancesInMM[2][1]=0;

    }

     

    The indexing on refDistancesInMM is [Tx channel] and [current setting, 0 being H and 1 being L]. In order for them to find the proper distances to set for each current and tx setting, you will need to change your configuration to do just one current, flash that, and see at what distance you can get 16000-24000 codes for that particular current. At higher currents, that distance will be pretty far with a white background, so you can use darker backgrounds in order to get lower amplitude settings, but they’ll need to remember what current settings used what color background when you do the calibration.

     Once you know these distances, you can enter that into OPT3101Coefficients.cpp and then use super-HDR configuration and perform the calibration.

    Also: I know the EVM and other documentation shows ferrite beads for the design. Personally I don't lke the selected ferrite beads. The DCR value is to high. Your part number for the ferrrite beads has a 1.5Ohm DCR. The voltage drop acroos this part will give you a high ripple.

    1800 ±25% 1800 ±40% 1.50 200 MMZ1005S182ET000

    My reomendation is to change to the MPZ1005S121HT000 it has a 55mOhm DC impedance. Still provides good RF attenuation but minimizes the ripple and electrical noise.

    Please verifiy that the calibration is correct.