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AWRL1432: mmWaveStudio 波形配置

Part Number: AWRL1432

Tool/software:

关于1432 BSD EVM的mmWave波形配置,有两点疑问如下:

1.跳频配置上限:

下图中的SizeInWords和Len of Array两处,即使我txt里放置了更多的配置数值,但是也只能读进来100个,是有什么配置限制吗?举个例子,这样的话我一个frame里有超过100个chirp,我不能实现每个chirp一个step,只能通过设置repetition=2,实现chirp1-2step1chirp3-4step2……

2.Rxgain配置后时域ADC数据幅度无变化:

配置了fecRfBootCal和fecRfRuntimeCal,采集bin数据分析,但幅度并没有变化,Rxgain应该如何通过mmWavestudio配置呢,Lua相关部分如下。

local rx_gain_db = 40
xw_status, response=mws.fecRfBootCal(0,{h_CalCtrlBitMask=64,c_MiscCalCtrl=0,c_CalRxGainSel=rx_gain_db,c_CalTxBackOffSel0=0,c_CalTxBackOffSel1=0,c_CalTxBackOffSel2=0,c_CalTxBackOffSel3=0,h_CalRfFreq=49438,xh_CalRfSlope=131,c_TxPwrCalTxEnaMask0=0,c_TxPwrCalTxEnaMask1=0,c_TxPwrCalTxEnaMask2=0,c_TxPwrCalTxEnaMask3=0,w_Reserved1=0,xc_CalTempBinOverrides0=0,xc_CalTempBinOverrides1=0,xc_CalTempBinOverrides2=0,c_Reserved2=0,w_Reserved3=0,w_Reserved4=0})
assert(xw_status == 0, "ERROR: API failed")
xw_status, response=mws.fecRfRuntimeCal(0,{h_CalCtrlBitMask=64,h_Reserved0=0,c_TempBinIndex=8,c_Reserved1=0,h_Reserved2=0,w_Reserved3=0,w_Reserved4=0,w_Reserved5=0})
assert(xw_status == 0, "ERROR: API failed")

  • (Translate to English) About how to configure profile using mmwavestudio with 1432 BSD EVM, have two queations as below:

    1.frequency hopping upper limit

    SizeInWords and Len of Array as shown in figure,eventhough I put more nums of values in txt, it can only read 100 steps,are there any upper limit?

    For example, if I want to configure more than 100 frequency hopping chirps in a frame, I can only set repetition to 2, to realize chirp1-2 -frequency start step1, chirp1-2 -frequency start step2.

    2.Rxgain(range from 30 to 40dB) are not set and shown successfully in ADC time-domain data, the amplitude are not change

    I have configure fecRfBootCal and fecRfRuntimeCal API, whose time-domain amplitude are not change, so I have question about how to configure Rxgain with mmwavestuid, part of lua are as follows:

    local rx_gain_db = 40
    xw_statusresponse=mws.fecRfBootCal(0,{h_CalCtrlBitMask=64,c_MiscCalCtrl=0,c_CalRxGainSel=rx_gain_db,c_CalTxBackOffSel0=0,c_CalTxBackOffSel1=0,c_CalTxBackOffSel2=0,c_CalTxBackOffSel3=0,h_CalRfFreq=49438,xh_CalRfSlope=131,c_TxPwrCalTxEnaMask0=0,c_TxPwrCalTxEnaMask1=0,c_TxPwrCalTxEnaMask2=0,c_TxPwrCalTxEnaMask3=0,w_Reserved1=0,xc_CalTempBinOverrides0=0,xc_CalTempBinOverrides1=0,xc_CalTempBinOverrides2=0,c_Reserved2=0,w_Reserved3=0,w_Reserved4=0})
    assert(xw_status == 0"ERROR: API failed")
    xw_statusresponse=mws.fecRfRuntimeCal(0,{h_CalCtrlBitMask=64,h_Reserved0=0,c_TempBinIndex=8,c_Reserved1=0,h_Reserved2=0,w_Reserved3=0,w_Reserved4=0,w_Reserved5=0})
    assert(xw_status == 0"ERROR: API failed")
  • Hey Jin,

    Thank you for posting your question. I would recommend posting this question on the China E2E board where our engineers may be better able to support you.

    https://e2echina.ti.com/

    Regards,

    Kristien

  • Yes,I have posted on China E2E as well, but I have not received reply till now,so I try it here ,too.

  • Hey Jin,

    Thank you for updating us. One of experts will get back to you by the end of today or tomorrow.

    Thank you for your patience,

    Kristien

  • Hi, Yitong:

    I am not familiar with frequency hopping feature.  We can focus on your second question for now.

    Yes, for xWRLx432, the TX power backoff and RX gain setting will go through fecRfBootCal.   If you set 36dB and 40dB RX gain, can you share the ADC output figure in postProc window to show that there is no difference in ADC level?   I would recommend you use a regular chirp configuration without frequency hopping.  

    Best,

    Zigang

  • Hi Zigang:

    Of course, I have capture raw adc data in same environment using 1432BSD EVM at office desk toward ceiling. In this test, to obtain the results more obviously, I set RX gain to 30 and 40 dB. Both results are shown as below, which I capture two adjacent in-phase and anti-phase chirps in both bin data, choose the same doppler bin and Rx channel, and I notice that the amplitude in each frames is similar. The profile I use are both the same simple chirp configuration without frequency hopping, enable fecRfBootCal and fecRfRuntimeCal.

    My question  is that (1) I can't find the corresponding amplitude change in these results (10^10/20=3.16).

    (2) BSD EVM antenna is the same as 2944EVM, but the adc amplitude without sacle is smaller than ±50, could you, experts help to see whether have the same low-level.

  • Hi, Yitong:

    Since the DC value is significant, and your target is not corner reflector, it will be harder to compare the two ADC curves of different RX gains.   However, I can still see a major difference between the signal swing.  For example, the swing for 40dB gain is 45 and 35; and the swing for 30dB gain is around 18 and 12.   It may be more obvious if you look at the range FFT output.   

    The ADC output is 12 bits output for xWRL1432, but 16 bits for 2944.   So, there will be at least 4 bits different in signal scale. 

    Best,

    Zigang

  • Hi Zigang,

    I see, and I will add corner reflector test results soon.

    Best,

    Yitong

  • Hi Zigang,

    As you mentioned, I tested the 10dBsm corner reflector of 5.5m in chamber, and the changes of Rxgain can be seen from the amplitude of the noise and peak value, but the time domain amplitude is not obvious. Can you come to a conclusion base on these results:  the configuration of Rxgain is effective?

    In addition, Is time domain amplitude such small, in TI 1432 BSD EVM test? I think the target has been calculated as a close strong target, but completely can not reach close to 12bits.

    Best,

    Yitong.

  • And about my queation 1 frequency hopping upper limit with mmwavestuio, I would like to know I should ask who, TI expert.

    Thanks a lot.

  • Hi, Yitong:

    Your new data clearly shows the configuration of Rx Gain is effective.  

    I will now assign this ticket to other expert for continuing support for the hopping topic. 

    Best,

    Zigang

  • Hi Jin,

    You will need to use the advance frame feature. Please refer to the following thread (+) AWR1843: How to set Frequency Hopping Mode? - Sensors forum - Sensors - TI E2E support forums

    Regards,

    Aydin

  • Hi Zigang,

    Thanks a lot for resolving Rxgain question.

    And I would like to ask: Is time domain amplitude such small, in TI 1432 BSD EVM test? I think the target has been calculated as a close strong target, but completely can not reach close to 12bits.

    Best,

    Yitong.

  • Hi Aydin,

    Yes,I have successfully configured frequency-hopping in 1432(not succeed the upper limit as I described) and 1843EVM. But there is some difference between the two platform, when I configure 128 chirps in a frame using 1432EVM in BPM mode, I successfully made 64 frequency start steps, and every two BPM chirps at same step.But when I configure 256 chirps in a frame, I also want to set 128 frequency start steps with every two BPM chirps at same step, but I can't read and set more than 100 frequency start values from txt to ROM, even if there are 128 values in my txt. So I have question about 1432 EVM frequency hopping upper limit. 

    Best,

    Yitong.

  • Hi Jin,

    Looks like the upper limit size of the array is limited to 100. Please give us until next week to follow up with our firmware team and get back to you on this. 

    Regards,

    Aydin

  • HI, Yitong:

    It also related to what kind of HPF setting you are using.  If you are using a lower high pass filter setting, you may experience higher ADC values.

    Best,

    Zigang

  • Hi Aydin,

    Thanks a lot and hope to hear from you.

    Best,

    Yitong.

  • Hi Zigang,

    This is indeed one of the factors that can affect ADC amplitude, I'll take some time to verify this internally.

    Best,

    Yitong.

  • Hi Jin,

    I'm still waiting for a response from the firmware team in this regard. Once I hear back, I will update.

    Regards,

    Aydin

  • Hi Aydin,

    Does the firmware team response about the upper limit?  Hope to hear from you.

    Best,

    Yitong.

  • Hi Jin,

    Sorry for the delay. I still have not received a response from the team. Someone from the software team will get back to you on this thread.

    Regards,

    Aydin

  • Hello,

    I am following up with the respective team. 

    Let me get back to you by the end of the week. 

  • For 2 The issue is in GUI which is currently restricting the count to 100. From API implementation point there is no restriction.

    So you can use lua API for count > 100. (You will get an error though in log console for count > 100 which you can ignore as that is related to GUI update, The actual LUT write will succeed.)

    For 1 please refer to the second thread you have created

    e2e.ti.com/.../awrl1432boost-bsd-adc-data-range-is-small

  • Hi Zigang,

    First of all, ES1.1 EVM has solved the problem of RX gain configuration before, and the configuration of fecRfBootCal and fecRfRuntimeCal takes effect.
    Second, the same configuration is currently set in the ES2.0 EVM, using the rfevalfirmware updated in SDK5.5, but if RuntimeCal is enabled, an error will appear, so I would like to ask whether there is any difference between ES2.0 and previous versions.Please help to see with this problem.

    Thanks a lot,

    Yitong.

  • Please start a new thread regarding this specific issue for better resolution