Tool/software:
Hello Everyone!
There is a technique used to compensate for frequency mismatches in case of cascaded designs (Chapter 4.2 and 5.1.1 here /cfs-file/__key/communityserver-discussions-components-files/1023/signalPrcesssing_5F00_userguide_5F00_4chipCascade.pdf)
My question is:
- What level of accuracy can be achieved using is this technique?
Let's say we have a single chip design (not cascaded), and I need to have as short feedlines as possible. In this case, the feedline length wouldn't be balanced, the deviation may be more than lambda.
- Can it be used to compensate for feedline imbalances more than lambda?
I understand, that for the calibration matrix in chapter 4.2., the Delta P is rangebin deviation (which translates to frequency error). Based on the shape of the rangeFFT profile, the actual reference target position can be interpolated. I was thinking, that the interpolation might give me the necessary subrange accuracy to compensate feedline lengths down to subwavelength range.
Thanks!
