DDC114: Schematic Review

Hi Atul,

1) Depending whether you want to use Continuous Mode (and capture the data before or after the CONV signal toggles) or Non-Continuous, you'd have to use a different approach for calculating the required timing.
If you already know the integration time (Tint) and the data clock (DCLK) frequency, you can calculate the maximum number of DDC114s that could be daisy-chained together. This information appears on the DDC114 Datasheet Equations (pages 23-25). If the number you calculate with the formula is bigger than 16, you'll know that 16 should work.

2) For the schematic review, I'd have to contact the Systems Engineer to verify. From my side, nothing seems out of the ordinary, but I'd have to check anyways.

Hope this can help.

Regards,
Simon

Thanks a lot for the quick reply, Simon.
One more question :- I have a query regarding number of DDC114 ICs that can be connected in cascade. I saw the formula on Page 24 of datasheet. What if my integration time is taken is more than 331.125usec?

Hi Atul,

Just received a reply from our Systems Engineer regarding the fist post.  

The schematic, seems fine, for the most part. Some minor things you could consider checking:

1. On U10 (the first device in the chain) DIN and DIN/ are connected to two pull-ups to what it seems to be 5V . Although there's resistor dividers so that any voltage can acually be set, DVDD is usually set to 3V. Why did you choose a 5V supply a divider solution like this one? We're just wondering in case this was overlooked, so you think about it.

2. As DIN, DIN/ are complementary inputs, it would be expected one resistor to be up and the other down.

3. At the layout level, may want to keep the same length for CONV and CLK lines, so, that the reference is getting hit by all the converters at the same time and one is not hit one after the other.

Also, about how many DDC114 can be connect in series, there is of course, the timing issue (can you pump the data out fast enough) and that depends on the sample rate. It's something you can calculate with the aforementioned formulas. There is also the fact that having all those DDCs connected in parallel to the same reference may not yield the best performance possible, but I would think it should be fine. You could try different strategies, like star connection of the reference, or wider plane going to all of them, etc…  
In conclusion, the solution you proposed seems viable and if some degradation happens (which is unlikely for these number of channels, there's more problems with a higher channel count device,as >64 channels), then try something else. 

 

Regarding your last question, if Tint > 355.125us, instead of using the formula on page 24, use the scheme on page 23 or even 25 for calculating the time.
In other words, how did you choose the formula in page 23 specifically instead of the other ones?

Hope this makes thing more clear.

Regards,
Simon

Hi Simon, Thanks for this wonderful support. Regarding the last point :-
I chose the formula on page no 24 because I collect data after conversion signal toggles.
I checked with the formulas you suggested on page no. 23 and 25. As per the calculation I found that if my Tint >355.125us I can connect more ddc in daisy chained format. Correct if I m wrong and explain the impact if my Tint >355.125usec.

Atul,

Yes, you are correct!
The number of daisy-chained DDC114s will depend on the precise moment when you collect the data (before or after the CONV toggle) and on your data rate.
As per the datasheet, for longer integration times it makes sense to retrieve the data before CONV toggles again, as there will be enough time before the edge rises again if the Tint is big enough.
Did you have any reason for choosing the other scheme-"After CONV Toggles"?
I'm just wondering because it could be better to use the "before CONV toggle" scheme if the integration time is big enough to fit all of the data to be read. 

Regards
Simon