AWR1243: clock/sync pins for cascading

We are planning to cascade four AWR1243 devices using a single master, and are looking to utilize the two 20GHz output signals.  For the FMCW_CLKOUT and FMCW_SYNCOUT outputs, how closely matched in phase are they at the device pins?  Is there an internal phase adjustment for one or both of the outputs in order to calibrate and match them in case there may be part to part and/or possible variances over temperature?.  Also, I've seen some differing information on the input buffer sensitivity.  One response from TI states the input should be 0dBm, another says that the buffer sensitivity is -10dBm.  Please confirm what the acceptable range is.  I came across +6dBm output power in one post, and +7dBm in another, but obviously verifying this is not as much of a concern for me.  Thanks -