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AWR1243: Frame Periodicity calculation

Part Number: AWR1243

I would like to know if it is possible to set the frame duty cycle to 100% by setting the frame periodicity parameter to

(idleTimeConst + rampEndTime) * numOfChirps

If not, what should frame periodicity set to if I do not intend to enable calibrations or monitoring? 

  • Hi,
    Could you explain the reason why are your seeking to obtain 100% frame duty cycle?
    As Host requires Inter-frame idle time to do the FFT processing (2-D, 3-D etc.) after collecting Raw-ADC data for all the chirps (and do the 1-D FFT during inter-chirp duration).


    Regards,
    Jitendra
  • Hi

    The FFT processing is done outside of the AWR1243 chip, I only intend to collect RAW-ADC data. Having said that, I need to minimize the inter-chirp time as much as possible to fully utilize the AWR1243.

    This is my use case. 

    Given N different waveform configurations ( chirp/profile/frame configurations), Let's say its' N = 2

    waveform 1 = 1ms total chirp time, 1ms inter frame time, -> 2 ms frame periodicity 

    waveform 2 = 2ms total chirp time, 2ms inter frame time, -> 4 ms frame periodicity 

    In 12ms I can have 2 x waveform1 + 2x waveform2 -> 4ms + 8ms

    However, if the inter frame time is 0 ms, I can fired off 4 x waveform1 + 4x waveform2 -> 4ms + 8ms

     

    Thanks, 

    Dom

  • Hello Dom,
    Device requires inter-frame idle time to prepare the system for the next frame (copy the configuration to HW registers, and other HW flow). As per ICD min. 200usec is required as idle-frame duration (no calibration/monitoring enable).
    And inter-chirp can be reduced to min. value where that time is sufficient to transfer that chirp data over LVDS/CSI2 at pre-configured HSI data rate.
    Based on these statements you can play with chirp/frame-idle value to achieve your requirement.


    Regards,
    Jitendra
  • Hi, 

    I understand the inter-frame time must be >=200us. However, when the following parameters were program,

    chirpCfg.chirpStartIdx    0
    chirpCfg.chirpEndIdx      3
    chirpCfg.profileId        0
    chirpCfg.startFreqVar     0
    chirpCfg.freqSlopeVar     0
    chirpCfg.idleTimeVar      0
    chirpCfg.adcStartTimeVar  0
    chirpCfg.txEnable         5
       
    frameCfg.chirpStartIdx      0
    frameCfg.chirpEndIdx        3
    frameCfg.numLoops           128
    frameCfg.numFrames          1
    frameCfg.numAdcSamples      750
    frameCfg.framePeriodicity   3040000
    frameCfg.triggerSelect      2
    frameCfg.frameTriggerDelay  0
       
    profileCfg.profileId             0
    profileCfg.pfVcoSelect           0
    profileCfg.pfCalLutUpdate        0
    profileCfg.startFreqConst        1435388860
    profileCfg.idleTimeConst         300
    profileCfg.adcStartTimeConst     440
    profileCfg.rampEndTime           2540
    profileCfg.txOutPowerBackoffCode 0
    profileCfg.txPhaseShifter        0
    profileCfg.freqSlopeConst        181
    profileCfg.txStartTime           0
    profileCfg.numAdcSamples         375
    profileCfg.digOutSampleRate      18750
    profileCfg.hpfCornerFreq1        0
    profileCfg.hpfCornerFreq2        0
    profileCfg.rxGain                48

    The AWR will generate the error below once multiple frames of the above setting were trigger

    Sub block 0x1011 – AWR_CAL_MON_TIMING_FAIL_REPORT_AE_SB

    Error code : 0x5

    This is unexpected because all the one time & periodic calibration of various RF/analog aspects are disabled by calling rlRfRunTimeCalibConfig with arlRunTimeCalibConf_t = {0}. Moreover, if the frame periodicity is modify from 3040000 to 3240000. The timing fail report error will go away. 



  • Hi,
    Don't call rlRfRunTimeCalibConfig API, even though you disable all the calib option, there are few default calibrations device does at the invocation of this API.

    Hopefully, without this API call, you should able to achieve your frame/chirp timing constraint.


    Regards,
    Jitendra
  • Hi,

    I tried to not call rlRfRunTimeCalibConfig API config and I am still unable to achieve my frame/chirp timing constraint.

    The setting I posted on Oct 22, 2018 5:21 PM had an overhead of 659,200ns = framePeriodicity - frameTime = (3040000 * 5ns) - ((2540 + 300) * 10ns * 512 chirps) = 15,200,000ns - 14,540,800ns. which already far exceeded the 200us specified in the ICD. Having said that, how should framePeriodicity be derived?

    Thanks,
    Dom
  • Hi Dom,
    Could you try running same scenario with DCA1000 and AWR1243 using mmWve-Studio to verify this config? Configuration and timing wise it looks, having said that this is unusual case where frame is loaded ~95% duty cycle with HSI (LVDS/CSI-2) data being pump out.
    And when are you saying you are not able to achieve timing constraint, that means device is throwing an error while capturing data with this configuration?
    You have correctly derived Frameperiodicity which is based on [(chirp-ramp-time+chirp-idle-time)*(chirp-end-idx - chirp-start-idx + 1)* numOfLoop + idle-frame-time]

    Are you using CSI-2 or LVDS to read the raw data at External Host? Make sure that these interface is running sufficient data rate which should enough to capture chirp data during one chirp end time to start of next chirp.


    Regards,
    Jitendra
  • Hi Jitendra,

    Could you try running same scenario with DCA1000 and AWR1243 using mmWve-Studio to verify this config?
    No, I don't have access to DCA1000, therefore I won't be able to verify this configuration as you suggested.

    And when are you saying you are not able to achieve timing constraint, that means device is throwing an error while capturing data with this configuration?
    Yes, the device is throwing the AWR_CAL_MON_TIMING_FAIL_REPORT_AE_SB (error code 0x5) with this configuration.

    Are you using CSI-2 or LVDS to read the raw data at External Host?
    I am using LVDS to read the raw data t external host.

    Back to my original question, how come the AWR1243 is throwing the AWR_CAL_MON_TIMING_FAIL_REPORT_AE_SB error even though the framePeriodicity is program to meet the requirement specified in the ICD. If possible, can you try the same settings on your end to recreate the problem?


    framePeriodicity 3040000
    profileCfg.idleTimeConst 300
    profileCfg.rampEndTime 2540
    frameCfg.chirpStartIdx 0
    frameCfg.chirpEndIdx 3
    frameCfg.numLoops 128


    Thanks,

    Dom
  • Hi Dom,

    In RadarSS, APLL and SYNTH calibrations are done always internally irrespective of bits are enabled or not, the time required for these calibrations must be allocated. And time required for these are 150 and 300usec respectively in addition of 150usec (application of calibration to hardware), which you need to have during inter-frame idle time. RadarSS will send FAIL_REPORT async event if inter-frame time is not sufficient to do these calibrations.This information is explained in ICD (of DFP) Table 9.2 (sl.no 1,2,7). 

    I have same config at my end and it requires around 1.1ms inter-frame time (15.65msec frame periodicity) to avoid this failure report as on top of above timing constraint RadarSS requires watchdog clearing time as well which increases this time.

    For the purpose of capturing the raw data you can ignore this Async event report and proceed further.

    Regards,

    Jitendra